Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2003-07-07
2008-08-26
Beausoliel, Jr., Robert W (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
07418626
ABSTRACT:
An information processing apparatus of the present invention includes first and second computer elements which execute the same instructions substantially simultaneously and which are substantially synchronized with each other. The first computer element includes first and second memory elements, which are written by the first and second computer elements, respectively, during a first state. The information processing apparatus has a control element which makes the first computer element read from the second memory element during a second state. Another information processing apparatus has the first and second computer elements, and first and second memory areas which are provided in the first computer element. The first and second memory areas are written by the first computer element and the second computer element, respectively, during a first state. A control element makes the first computer element read from the second memory area during a second state.
REFERENCES:
patent: 4823256 (1989-04-01), Bishop et al.
patent: 5091847 (1992-02-01), Herbermann
patent: 5155845 (1992-10-01), Beal et al.
patent: 5287484 (1994-02-01), Nishii et al.
patent: 5295258 (1994-03-01), Jewett et al.
patent: 5317726 (1994-05-01), Horst
patent: 5398331 (1995-03-01), Huang et al.
patent: 5574849 (1996-11-01), Sonnier et al.
patent: 5751932 (1998-05-01), Horst et al.
patent: 5751955 (1998-05-01), Sonnier et al.
patent: 5838894 (1998-11-01), Horst
patent: 5953742 (1999-09-01), Williams
patent: 6233702 (2001-05-01), Horst et al.
patent: 6389554 (2002-05-01), Jung et al.
patent: 7003691 (2006-02-01), Safford et al.
patent: 2002/0065996 (2002-05-01), Garnett et al.
patent: 2004/0225946 (2004-11-01), Hashimoto et al.
patent: 2006/0150006 (2006-07-01), Mizutani
patent: 2006/0150010 (2006-07-01), Stiffler et al.
patent: 2008/0005614 (2008-01-01), Lubbers et al.
patent: 0 411 805 (1996-10-01), None
patent: 0 757 315 (1997-02-01), None
patent: 3-219333 (1991-09-01), None
patent: WO 00/60463 (2000-10-01), None
Aino Shigeyuki
Yamazaki Shigeo
Beausoliel, Jr. Robert W
Mehrmanesh Elmira
NEC Corporation
Sughrue & Mion, PLLC
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