Inert barrier for high purity epitaxial deposition systems

Details Inert barrier for high purity epitaxial deposition systems Inert barrier for high purity epitaxial deposition systems

1999-07-01

2001-06-12

Bueker, Richard (Department: 1763)

Coating apparatus

Gas or vapor deposition

Multizone chamber

C118S715000, C118S725000, C118S733000

Reexamination Certificate

active

06245149

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor processing apparatus and, more particularly, to the use of an inert barrier to insulate an O-ring seal and prevent O-ring contamination of the processing region.
2. Description of the Related Art
Present day equipment for the semiconductor industry seeks to obtain increased throughput by transitioning from 200 mm substrates toward larger substrate diameters such as 300 mm. Larger substrate diameters necessitate increased gas flows and energy input requirements to enable the same processing results achieved on smaller diameter substrates. At the same time, increased throughput is sought through the extension of deposition cycles. However, increases in deposition cycles are directly proportional to increased cleaning cycles particularly in those processing areas that utilize periodic cleaning cycles. One example of a process that utilizes periodic cleaning is the deposition of epitaxial silicon. In an epitaxial silicon reactor, a typical cleaning cycle is particularly arduous since it includes heating the processing region to about 1200° C. and injecting HCl. The combination of increased energy requirements that are needed for larger substrates and the desire for longer cleaning cycles has strained the design of existing reactors. Exposed components are particularly vulnerable to the increased requirements such as the innermost O-rings or those O-rings closest to the process area. In typical reactors these O-rings provide a pressure seal for the processing chamber and are exposed to the heat and chemistry of both the deposition and the cleaning cycles.
FIG. 1
is a typical example of a double dome processing reactor suitable for chemical vapor deposition (CVD) of silicon films such as the EPI chamber sold by Applied Materials, Inc. of Santa Clara, Calif. In this figure a CVD reactor
10
includes a top dome
12
, a bottom dome
16
and side walls
14
,
15
which together define a processing region
18
into which single or multiple substrates, such as silicon wafer
20
, can be loaded. Wafer
20
is mounted on a susceptor
22
that can be rotated by drive
23
to provide a time-averaged environment for the wafer
20
that is cylindrically symmetric. A quartz ring
118
is disposed between sidewalls
14
and
15
and susceptor
22
. A preheat ring
24
is supported by quartz ring
118
and surrounds susceptor
22
.
Wafer
20
, preheat ring
24
and susceptor
22
are heated by a plurality of lamps
26
mounted outside processing region
18
. Top dome
12
, bottom dome
16
and insert
118
are typically made from quartz because it is transparent to light of both visible and IR frequency, it exhibits relatively high strength and because it is chemically stable in the processing environment of the chamber. Sidewalls
14
and
15
include clamp rings
40
and
42
that are used to secure top and bottom domes
12
and
16
to base ring
44
. Clamp rings
40
and
42
and base ring
44
are typically made from stainless steel.
The structure of side walls
14
and
15
and their relationship to processing region
18
can be better appreciated by referring to FIG.
2
.
FIG. 2
illustrates an enlarged view of sidewalls
14
,
15
and insert
118
. O-rings
50
,
52
,
54
and
56
are used to form seals between upper clamp ring
40
and base ring
44
enabling a pressure seal between top dome
12
and processing region
18
. Additionally, O-rings
50
,
52
,
54
, and
56
are arranged to structurally support top dome
12
and counteract loading and thermal stresses. The near direct vertical alignment between O-rings
50
and
54
and between O-rings
52
and
56
indicates the top dome
12
is in compression with only a slightly cantilevered load. Top dome
12
is not in contact with either upper clamp ring
40
or base ring
44
. As such, gaps exist between top dome
12
and upper clamp ring
40
and base ring
44
.
Lower dome
16
is similarly supported. O-rings
58
and
60
are used to form seals between lower clamp ring
42
and base ring
44
and bottom dome
16
. Like top dome
12
, bottom dome
16
is not in contact with the sidewall elements that support it. Gaps exist between bottom dome
16
and rings
42
and
44
. Gaps are also present between quartz insert
118
and top and bottom domes
12
and
16
.
Referring back to
FIG. 1
, processing gas (whether reactant or dopant or cleaning) is supplied to processing region
18
from an exterior source, schematically represented by two tanks
28
. The gas flows from the gas supply
28
along a gas supply line
30
and into processing region
18
via a gas inlet port
32
. From the port
32
the gas flows through a passage in sidewalls
14
and
15
and a passage in quartz insert
118
. From insert
118
, the gas flows across the preheat ring
24
across the susceptor
22
and wafer
20
in the direction of the arrows
34
to be evacuated from region
18
through evacuation port
36
. A pumping source or other exhaust piping system is coupled to evacuation port
36
for the purpose of exhausting gases and by-products from processing region
18
. The dominant shape of the flow profile of the gases is laminar from the gas input port
32
and across the preheat ring
24
and the wafer
20
to the exhaust port
36
even though the rotation of the wafer
20
and thermal gradients caused by the heat from the lamps
26
do affect the flow profile slightly.
The above described CVD processing chamber can accommodate a number of different processes. Each process differs depending on the desired end result and has different considerations associated therewith. In the polysilicon deposition process, doped or undoped silicon layers are typically deposited onto the wafer using processes such as low pressure chemical vapor deposition (CVD). In this process a reactant gas mixture including a source of silicon (such as silane, disilane, dichlorosilane, trichlorosilane or silicon tetrachloride) and optionally a dopant gas (such as phosphine, arsine, or diborane) is heated and passed over the wafer to deposit a silicon film on its surface. In some instances a non-reactant, carrier gas such as hydrogen, is also injected into the processing chamber together with either or both of the reactant or dopant gases. In this process, the crystallographic nature of the deposited silicon depends upon the temperature of deposition. At low reaction temperatures of about 600° C. the deposited silicon is mostly amorphous; when higher deposition temperatures of about 650° C. to 800° C. are employed, a mixture of amorphous silicon and polysilicon or polysilicon alone will be deposited.
Processing region
18
could be cleaned after each deposition sequence or after a series of deposition sequences has been conducted. In a typical HCl based periodic cleaning cycle, a chamber clean cycle is conducted for every 10 to 20 &mgr;m of silicon deposited in reactor
10
. The cleaning cycle is conducted after removing the last wafer of the sequence from chamber
10
. Without a wafer present in the chamber, the susceptor temperature is raised to about 1200° C. while a mixture of HCl and H
2
is provided to processing region
18
. The HCl breaks down the silicon deposits formed within processing region
18
into volatile by-products that are exhausted from processing region
18
via evacuation port
36
.
One problem with current CVD reactors is that O-rings
50
,
52
,
54
,
56
,
58
and
60
are degraded by prolonged exposure to the chemistry, temperatures and pressures employed within processing region
18
during the deposition and cleaning processes. Typical removal rates form the HCl cleaning process above are about 2 &mgr;m/min. Longer deposition sequences, such as those having about 20 &mgr;m depositions between cleans, provide higher throughput but increase the length of exposure to HCl and 1200° C. which in turn increases the likelihood of O-ring degradation and failure. Degraded or failed O-rings result in contamination of processing region
18
and films formed therein as w

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