Independent use of bits on an on-chip bus

Details Independent use of bits on an on-chip bus Independent use of bits on an on-chip bus

1997-12-11

2000-03-07

Sheikh, Ayaz R.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710126, G06F 1338

Patent

active

060353643

ABSTRACT:
A computer chip including multiple on-chip modules connected by an on-chip bus which provides increased performance over current computer chip architectures. The on-chip system bus is a bit sliced bus. Various transmitters/and or receivers are coupled the bit sliced bus. The transmitters and/or receivers include bus interface logic and/or bit transfer logic and/or bit receive logic operatively coupled to the on-chip bit sliced bus which operates to allow different data streams to use different bit lines substantially simultaneously. Thus the bit sliced bus allows different devices to share the bus simultaneously. The bus interface logic and/or the bit transfer logic thus may assign one data stream to a subset of the total bit lines on the bit sliced bus, and fill the unused bit lines with another data stream.

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