Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Patent
1997-10-24
2000-05-16
Bragdon, Reginald G.
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
711168, 711149, 711150, 711167, G06F 1200, G06F 1316
Patent
active
060650923
ABSTRACT:
An independent and cooperative memory architecture is provided which includes a plurality of multi-line channels each capable of carrying either data or address information to a plurality of independent memory clusters. The channels can either operate independently to access and store data in separate ones of the memory clusters, or cooperatively to access and store data in one of the memory clusters. The independent and cooperative operation enables faster and more efficient utilization within a memory device over any prior art memory architecture. Each of the clusters have one or more independently addressable memory banks respectively having a plurality of data storage locations organized into respective arrays with each of the storage locations having a distinct column and row address. The multi-line channels provide a plurality of distinct operating modes for conducting selected data read and/or write transactions within the clusters.
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Bragdon Reginald G.
Hitachi Micro Systems Inc.
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