Incremental design using a group area designation

Details Incremental design using a group area designation Incremental design using a group area designation

2006-08-01

2006-08-01

Whitmore, Stacy A. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07086029

ABSTRACT:
Method and apparatus for incremental design is described. More particularly, a text-circuit description of the integrated circuit having logic groups of respective logic instances is obtained. Area groups are created for the logic groups and correspondingly assigned. Unchanged logic groups are guided on an incremental implementation from existing guide files, and changed logic groups are re-implemented in area groups corresponding to the changed logic groups. In this manner, runtime of the unchanged logic groups is reduced by an incremental guide implementation instead of a re-implementation, while performance of such unchanged logic groups is maintained from a prior implementation. Furthermore, degrees of freedom for re-implementing are enhanced for improving a design, as all prior mapping, placing and routing within a changed area group may be stripped for re-implementation.

REFERENCES:
patent: 5394030 (1995-02-01), Jennings et al.
patent: 5867396 (1999-02-01), Parlour
patent: 6799309 (2004-09-01), Dhanwada et al.
patent: 6910200 (2005-06-01), Aubel et al.

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