Increasing effective transistor width in memory arrays with...

Details Increasing effective transistor width in memory arrays with... Increasing effective transistor width in memory arrays with...

2011-04-05

2011-04-05

Hur, J. H. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Resistive

C365S242000, C365S243000, C365S063000, C365S072000

Reexamination Certificate

active

07920406

ABSTRACT:
A method for forming a memory structure, includes: forming an array of individual memory cells arranged in a network of bit lines and word lines, each individual memory cell further comprising a resistive memory device that is capable of being programmed to a plurality of resistance states, each of the resistive memory devices coupled to one of the bit lines at a first end thereof; configuring a rectifying element in series with each of the resistive memory devices at a second end thereof; configuring an access transistor associated with each of the individual memory cells, the access transistors activated by a signal applied to a corresponding one of the word lines, with each access transistor connected in series with a corresponding rectifying element; and forming a common connection configured to short neighboring rectifying devices together along a word line direction, in groups of two or more.

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