Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1998-10-07
2001-07-31
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S644000, C438S658000
Reexamination Certificate
active
06268284
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to the formation of an integrated circuit in a semiconductor substrate, and more specifically to enhancement of interconnect reliability by a method of filling high aspect ratio features of a contact or via.
BACKGROUND
As the demand increases for substrates or wafers to contain more and more devices, the number of interconnects in a substrate must increase. With complex integrated circuits, many oxide layers are deposited and more stacks are layered over the silicon base, forming interlevel stacks. Vias can be cut into these multilayered structures to permit interconnections between levels. These interlevel vias typically have a depth-to-width ratio greater than one and are termed high aspect ratio vias.
High aspect ratio features in vias or contacts permit a greater number of interlevel interconnects, but their depth makes it difficult to fill the via. For efficient interconnections between vias, the film deposited in the via must completely and uniformly coat both the bottom and sidewalls and must completely fill the via. Thus, the ability of a film to uniformly coat, form contact plugs and completely fill interlevel vias is important to the integrity and efficiency of the integrated circuit.
Typically, a metal layer of titanium (Ti) is first deposited into the via, followed by depositing a metal such as aluminum (Al) to fill the via. The Ti layer, ideally about 100 Å but usually in the range of about 300 Å to about 500 Å, serves as a wetting layer or seed layer for the subsequent Al or other metal deposition. The Ti layer also serves as a diffusion barrier to keep the metal in the metal oxide layer from diffusing into the silicon layer at the contact.
Al contact plugs require a barrier, usually titanium nitride (TiN) or titanium tungsten (TiW), and a wetting layer or seed layer of Ti. The TiN barrier is fortified by annealing, using either a furnace anneal or a reflow
20
module, to pack grain boundaries of the TiN to prevent electromigration. Al via plugs require only a seed or wetting layer such as Ti prior to a fill step.
The fill step can be by a “reflow”, “two-step”, “three-step”, Forcefill, or chemical vapor deposition (CVD), for example a plasma enhanced chemical vapor deposition (PECVD), process. The fill steps occur at an elevated temperature (>350° C.) allowing TiAl
3
to form in the reaction Ti+3Al→TiAl
3
.
While TiN can also act as a wetting layer, Ti is more desirable since TiN reacts with Al at higher temperatures. Additionally many subsequent anneals can form AIN, which is insulating. TiN is also thermodynamically unstable with respect to Al. However, Ti too has disadvantages as a wetting layer. A clean Ti surface, which is required for Al fill, reacts with Al when heated above 350° C. and forms TiAl
3
. The change in volume from TiAl
3
induces the problem of stress-related voiding. TiAl
3
is also much more resistive than Al, resulting in a net increase in the line resistance.
A minimum amount of Ti is required to provide continuous sidewall and bottom coverage of high aspect ratio features. Especially with collimated sputtering technologies, this leads to surface or field thicknesses in excess of 500 Å. A 500 Å layer of Ti in the field reacts with approximately 1500 Å of Al, which increases the line resistance. The contact resistance will also increase slightly by the conversion of Ti reacting with aluminum to form TiAl
3
as previously described.
Thus a method to form a thin metal film in high aspect ratio features to produce an efficient substrate or wafer is desirable.
SUMMARY
One aspect of the invention is a method of filling a feature. The method comprises depositing in a single reaction chamber by a physical vapor deposition process a first layer comprising a first metal and a second metal from a composite target of the first metal and second metal and subsequently filling the feature with a conductive metal. The first layer may be deposited by sputtering using, for example, an ionized deposition process, a conventional sputtering process or a collimated sputtering process, or may be deposited by electron beam evaporation or molecular beam epitaxy. In one embodiment the first metal is titanium and the second metal is aluminum. The method is particularly applicable to filling high aspect ratio vias.
The invention is also directed to a method of forming a contact plug in a via comprising depositing a first layer comprising a first metal and a second metal deposited simultaneously from a composite target of the first metal and second metal in a single reaction chamber, and then depositing a second layer of a metal to fill the via. The first metal may be either titanium or tungsten and the second metal may be aluminum or silicon. The first metal and second metal may be deposited by sputtering the composite source, such as by ionized physical vapor deposition. The method is useful for forming a contact plug in a high aspect ratio via and can be used to deposit a film layer of different stoichiometric quantities of the first metal and the second metal to form, for example, a titanium rich bottom region of the via.
Another aspect of the invention is a method of forming a continuous film on a via or contact sidewall and bottom prior to Al fill is disclosed. The resulting film, such as a titanium aluminide (TiAl
3
) film, provides a conformal thin seed layer for subsequent Al fill of the contact plug. The TiAl
3
film is thermodynamically stable in that no reaction occurs and the line resistance does not increase. Similarly, since there is no reaction in the via or contact, there is no volume reduction, thus reducing the risk of stress voiding. Additionally, the TiAl
3
layer still provides an advantage in preventing electromigration.
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J. K. Howard, et al. IBM Tech. Discl. Bull. vol. 23, No. 7B, pp. 3224-3226.(Dec. 1980).
Everhart Caridad
Tokyo Electron Limited
Wood Herron & Evans LLP
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