Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Patent
1997-01-24
1999-02-16
Trinh, Michael
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
438934, 438974, H01L 2166
Patent
active
058720170
ABSTRACT:
A method for preparing an epitaxial silicon wafer in a reactor is provided. The method comprises the steps of depositing an epitaxial layer on a surface of a silicon wafer contained in the reactor at an elevated temperature; purging the reactor with hydrogen after the epitaxial deposition; and cooling the reactor to an appropriate temperature which allows hydrogen passivation of the surface of the epitaxial layer. This prevents the formation of an oxide layer on the surface of the epitaxial layer for a sufficient amount of time to allow an accurate measurement of a carrier density profile of the epitaxial silicon wafer.
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patent: 5403434 (1995-04-01), Moslehi
patent: 5578504 (1996-11-01), Mitani et al.
"Low-temperature in situ cleaning of silicon (100) surface by electron cyclotron resonance hydrogen plasma", Heung-Sik Tae, et al., J. Vac. Sci Technol., vol. 13, No. 3, May/Jun. 1995, pp. 908-913.
"Standard Test Method for Determining Net Carrier Density Profiles in Silicon Wafers by Capacitance-Voltage Measurements With a Mercury Probe", ASTM, Designation: F 1392-93, pp. 601-613, 1993.
Boydston Mark R.
Mitchell Dena C. A.
SEH America Inc.
Trinh Michael
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