In-package E.sup.2 PROM redundancy

Details In-package E.sup.2 PROM redundancy In-package E.sup.2 PROM redundancy

1982-09-23

1984-08-07

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

365210, 371 10, G11C 1140, G11C 1300

Patent

active

044647360

ABSTRACT:
An E.sup.2 PROM redundant memory element is provided whereby faulty or improperly coded ROM or E.sup.2 PROM elements may be replaced by the user in-package. An address programming element including an E.sup.2 PROM floating gate device having a programmed mode, an unprogrammed mode, and an inhibit mode, may be programmed and erased in-package. Addresses received by the redundant memory element in addition to other inputs determine the mode of the floating gate device.

REFERENCES:
patent: 4363111 (1982-12-01), Heightley et al.
patent: 4393474 (1983-07-01), McElroy

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