In line test circuit and method for determining interconnect...

Details In line test circuit and method for determining interconnect... In line test circuit and method for determining interconnect...

2010-08-04

2010-12-21

Dang, Trung (Department: 2892)

Semiconductor device manufacturing: process

With measuring or testing

Electrical characteristic sensed

C324S1540PB, C714S731000, C257S048000, C257SE21540

Reexamination Certificate

active

07855090

ABSTRACT:
A test circuit for, and method of, determining electrical properties of an underlying interconnect layer and an overlying interconnect layer of an integrated circuit (IC) and an IC incorporating the test circuit or the method. In one embodiment, the test circuit includes a gate chain having a ring path and a stage. In one embodiment, the stage includes: (1) a underlying test segment in the underlying interconnect layer, (2) a overlying test segment in the overlying interconnect layer and (3) logic circuitry activatible after formation of the underlying interconnect layer and before formation of the overlying interconnect layer to place the underlying test segment in the ring path and further activatible after the formation of the overlying interconnect layer to substitute the overlying test segment for the underlying test segment in the ring path.

REFERENCES:
patent: 5321277 (1994-06-01), Sparks et al.
patent: 5790479 (1998-08-01), Conn
patent: 6304097 (2001-10-01), Chen
patent: 6423558 (2002-07-01), Maeda et al.
patent: 2001/0013781 (2001-08-01), De Jong et al.

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