In-line packet processing

Multiplex communications – Data flow congestion prevention or control – Flow control of data transmission through a network

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C370S392000, C370S395100, C370S415000, C370S428000, C370S474000

Reexamination Certificate

active

10081048

ABSTRACT:
A method and apparatus for in-line processing a data packet while routing the packet through a router in a system transmitting data packets between a source and a destination over a network including the router. The method includes receiving the data packet and pre-processing layer header data for the data packet as the data packet is received and prior to transferring any portion of the data packet to packet memory. The data packet is thereafter stored in the packet memory. A routing through the router is determined including a next hop index describing the next connection in the network. The data packet is retrieved from the packet memory and a new layer header for the data packet is constructed from the next hop index while the data packet is being retrieved from memory. The new layer header is coupled to the data packet prior to transfer from the router.

REFERENCES:
patent: 4799215 (1989-01-01), Suzuki
patent: 5025458 (1991-06-01), Casper et al.
patent: 5126999 (1992-06-01), Munter et al.
patent: 5166674 (1992-11-01), Baum et al.
patent: 5249292 (1993-09-01), Chiappa
patent: 5412648 (1995-05-01), Fan
patent: 5463762 (1995-10-01), Morrissey et al.
patent: 5469432 (1995-11-01), Gat
patent: 5487061 (1996-01-01), Bray
patent: 5530806 (1996-06-01), Condon et al.
patent: 5541926 (1996-07-01), Saito et al.
patent: 5553061 (1996-09-01), Waggener, Jr. et al.
patent: 5566170 (1996-10-01), Bakke et al.
patent: 5598410 (1997-01-01), Stone
patent: 5909440 (1999-06-01), Ferguson et al.
patent: 5909443 (1999-06-01), Fichou et al.
patent: 5923656 (1999-07-01), Duan et al.
patent: 6046979 (2000-04-01), Bauman
patent: 6094525 (2000-07-01), Perlman et al.
patent: 6128666 (2000-10-01), Muller et al.
patent: 6198751 (2001-03-01), Dorsey et al.
patent: 6219339 (2001-04-01), Doshi et al.
patent: 6304903 (2001-10-01), Ward
patent: 6464115 (2002-10-01), Wemyss et al.
patent: 6714553 (2004-03-01), Poole et al.
patent: 6791947 (2004-09-01), Oskouy et al.
Kaiserswerth, M., “The Parallel Protocol Engine”, IEEE ACM Transactions on Networking, US, IEEE Inc., New York, vol. 1, No. 6, Dec. 1, 1993, pp. 650-663, XP000430135, ISSN: 1063-6692.
Turner J., et al., “Architectural Choices in Large Scale ATM Switches”, IEICE Transactions on Communciations, JP, Institute of Electronics Information and Comm. Eng.. Tokyo, vol. E81-B, No. 1, Feb. 1, 1998, pp. 120-137, XP000778248, ISSN: 0916-8516.
US International Search Authority, International Search Report, PCT/US99/16890, Mailed Mar. 27, 2000, Washington, D.C. 20231.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

In-line packet processing does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with In-line packet processing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and In-line packet processing will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3778248

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.