In-circuit device, system and method to parallelize design...

Details In-circuit device, system and method to parallelize design... In-circuit device, system and method to parallelize design...

2005-09-16

2008-03-04

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07340705

ABSTRACT:
An in-circuit design and verification device, system and method are disclosed for cooperatively designing and verifying application-specific integrated circuit device prior to fabrication by emulating logical and specialized functions. By emulating specialized circuits of the ASIC, an in-circuit design and verification-device can advantageously detect errors that are not generally detectable by conventional techniques for verifying ASIC designs. In one embodiment, an in-circuit design and verification system includes programmable logic configured to emulate on-chip logic of an ASIC as well as a specialized function circuit configured to emulate a specialized function that the programmable logic cannot emulate. The in-circuit design and verification system also includes an emulation interface configured to exchange signals between the configured programmable logic and the specialized function circuit during in-circuit design and verification. The configured programmable logic and the specialized function circuit thus cooperate to emulate the ASIC.

REFERENCES:
patent: 6522985 (2003-02-01), Swoboda et al.

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