Improved device for sensing information store in a dynamic memor

Static information storage and retrieval – Read/write circuit – Including signal clamping

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365205, 365222, G11C 700

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active

053253310

ABSTRACT:
To enhance the speed at which dynamic random access memories are refreshed, each sensing amplifier is provided with a clamping transistor. The clamping transistor is connected to a preselected voltage source. The clamping transistor prevents the voltage on the low-going bit line from falling to circuit ground by clamping the voltage on the low-going bit line to the preselected voltage.

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R. L. Bishop and R. R. DeSimone, High Sensitivity, High-Speed Fet Sense Latch, IBM Technical Disclosure Bulletin, vol. 18, No. 4, Sep. 1975, pp. 1021, 1022.

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