Imprinting-damascene process for metal interconnection

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S648000, C438S650000, C257SE21585, C977S701000, C977S720000, C977S721000

Reexamination Certificate

active

11208624

ABSTRACT:
The present invention first obtains a nano-metal line by an e-beam lithography and an electroless plating, and imprints the line into a material with low-K to obtain a damascene metal line with low cost and high throughput, as a future solution for a metallization process for a general low-K metal damascene structure through CMP.

REFERENCES:
patent: 2003/0071016 (2003-04-01), Shih et al.
patent: 2004/0250945 (2004-12-01), Zheng et al.

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