Static information storage and retrieval – Addressing – Byte or page addressing
Reexamination Certificate
2003-01-31
2004-09-28
Elms, Richard (Department: 2824)
Static information storage and retrieval
Addressing
Byte or page addressing
C365S230030, C365S185110, C714S035000
Reexamination Certificate
active
06798713
ABSTRACT:
TECHNICAL FIELD
The present invention relates to setting breakpoints in program code.
BACKGROUND
In testing, debugging and developing software for a processor system, it is often desired to be able to stop the processor's execution of instructions at a specific place in the software code. One conventional approach of accomplishing this function involves providing a register and a multi-bit comparator. The comparator compares a multi-bit address value stored in the register with a multi-bit address value present on the address bus of the processor. The output of the comparator is a halt signal that is supplied to the processor. To set a breakpoint to stop the processor at a particular address, the user writes the address into the register. The processor is then started executing the instructions of the program. When the processor reaches the instruction that is stored at the address value in the register, the comparator determines that the address value in the register is the same value that is on the address bus of the processor. The comparator therefore outputs the halt signal and the halt signal in turn stops the processor. An external debugging tool is commonly provided whereby the user can determine the contents of the halted processor's internal registers. This approach that uses a register and comparator is sometimes called a hardware breakpoint. Because a significant amount of hardware is required to provide a hardware breakpoint, the number of such hardware breakpoints provided on a very low-cost processor might be limited.
Another conventional approach to providing a breakpoint is called a software breakpoint. One of the operation codes (opcodes) of the processor is a breakpoint instruction opcode. This instruction opcode may, in some systems, be an illegal instruction that is not used in the instruction set. In other systems it is an opcode of a legitimate instruction of the instruction set that is executed by the processor. When the processor fetches this particular opcode from program memory and decodes it, the processor detects the breakpoint instruction and takes a particular action. The particular action may, for example, be to halt. In another example, the processor may jump to a particular location. In another example, the processor may signal that the processor has reached a breakpoint instruction.
To place a software breakpoint into a program that is being debugged, the user typically overwrites a particular instruction of the program code in memory with the breakpoint instruction. The processor is then started to execute the program code. When the processor fetches and decodes the breakpoint instruction, the processor halts and performs the operation to be performed by the breakpoint instruction. Again, as in the hardware breakpoint example, a debugging tool is then often used to determine the contents of the processor's internal registers or to otherwise determine the state of the system. Because many such software breakpoints can be set using the same hardware on the processor, this approach is often suitable for use on a very low cost processor.
In some systems, the processor fetches and executes instructions out of a programmable non-volatile memory such as, for example, a flash memory. The data bit in each memory cell of the flash memory can have one of two states, either the programmed state or the unprogrammed state. The data bits of the flash memory are initially all in the unprogrammed state. A particular word of memory cells can then be written such that some or all of the bits of the word are changed to the programmed state. An individual bit within a memory cell cannot, however, be changed from the programmed state back to the unprogrammed state with a write operation. To change a bit back to the unprogrammed state, a large group of bits (called a “page” or a “block”) containing the bit to be changed is “erased” in a single erase operation. The erase operation results in all the bits in the page having the unprogrammed state.
Accordingly, when a software breakpoint instruction is to be written over another instruction in the program code, and where the program code is stored in flash memory, it generally is necessary to change some of the bits from the programmed state to the unprogrammed state. Accordingly, the page of flash memory that contains the instruction to be overwritten is erased. This may be done by erasing one page of the flash in a page erase operation, or may be done by erasing the entire flash device in what is called a bulk erase operation. Once the page of flash memory is erased, the page of program code previously stored in the page of the memory is rewritten back into the page of memory except that the breakpoint instruction is now in place of the instruction to be overwritten.
This method of inserting a breakpoint instruction into program code is undesirable in certain respects. First, a memory cell of flash memory has a limited number of times it can be erased. The erase and rewrite process of inserting a breakpoint instruction is undesirable in that it uses up some of the erase and rewrite cycles of the flash memory cells. Second, the erase and rewrite process is cumbersome and slow. Depending on the flash technology employed and the amount of memory to be rewritten, it may take as much as a few seconds to perform one erase and rewrite operation. Where the memory used to store the program code is not flash, but rather is a programmable read only memory (PROM) that is erased by exposure to ultraviolet light, it may take up to twenty minutes to perform one erase and rewrite operation. Setting and removing such software breakpoints is therefore somewhat cumbersome.
SUMMARY
Program code for a processor is stored in a programmable non-volatile memory. The programmable non-volatile memory has a plurality of memory cells. A bit of data stored in one of these memory cells can either have a programmed state or an unprogrammed state. An individual bit of data stored in a memory cell can be changed from the unprogrammed state to the programmed state by writing an appropriate value into a word of memory cells using a write cycle. An individual bit stored in the memory cannot, however, be changed from the programmed state back to the unprogrammed state without erasing all the bits of a page of memory cells. Such a non-volatile memory can, for example, be a flash memory or an erasable programmable read only memory (EPROM) that is erased by exposure to ultraviolet light.
In accordance with one embodiment of the present invention, the processor has an instruction set that includes a breakpoint instruction, where the opcode for the breakpoint instruction is a multi-bit value, all the bits of which are the programmed state. If the breakpoint instruction is an eight-bit instruction, and if the programmed state of the memory is a digital “0”, then the breakpoint instruction is “0000 0000”.
A breakpoint instruction in accordance with this embodiment of the present invention can therefore be written over any other instruction that might be present in the non-volatile memory using a write cycle. A write cycle can be used because no bit to be overwritten is to change from the programmed state to the unprogrammed state. Rather, the only bits that change are ones that are to change from the unprogrammed state to the programmed state. The breakpoint instruction can therefore be inserted into the program code without having to erase one or more pages of code stored in the non-volatile memory.
In some embodiments, execution of the breakpoint instruction causes the processor to halt and a debug acknowledge signal to be output automatically onto a terminal of the processor. The debug acknowledge signal is used to alert an external debugging tool that the processor has stopped at a breakpoint. On-chip debugger hardware is provided-on the same integrated circuit as the processor. The on-chip debugger hardware allows the processor to “step over” the breakpoint and to continue on executing instructions of the program code. To step over the br
Nekl Joshua J.
Yearsley Gyle D.
Elms Richard
Nguyen N.
Silicon Edge Law Group LLP
Wallace Darien K.
Wallace T. Lester
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