Implementing memory read data eye stretcher

Details Implementing memory read data eye stretcher Implementing memory read data eye stretcher

2007-10-18

2010-02-09

Levin, Naum B (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C375S317000, C711S167000, C711S211000, C365S189090

Reexamination Certificate

active

07661084

ABSTRACT:
A method and data receiver apparatus implement a high speed, such as double data rate (DDR), memory read data eye stretcher and a design structure on which the subject circuit resides is provided. Altering the reference level is performed to increase the size of the data eye. Knowledge of the previous data state is used to adjust the reference level for the current data being latched so that the data eye is maximized.

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