Implementing bufferless Direct Memory Access (DMA)...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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C710S028000, C710S036000

Reexamination Certificate

active

07447810

ABSTRACT:
According to one embodiment a method for implementing bufferless DMA controllers using split transaction functionality is presented. One embodiment of the method comprises, generating a write command from a disk controller directed to a destination unit, the write command including an identifier, generating a read command from the disk controller directed to a source unit, the read command including an identifier which matches the identifier in the write command, the source unit transmitting read data on a split transaction bus, the read data including the identifier of the read command, and receiving the read data at the destination unit via the split transaction bus if the identifier of the read data matches the identifier of the write command.

REFERENCES:
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patent: 5918070 (1999-06-01), Moon et al.
patent: 5928346 (1999-07-01), Johnson et al.
patent: 6748479 (2004-06-01), Sano et al.
patent: 6832279 (2004-12-01), Potter et al.
patent: 0 525 860 (1993-02-01), None
PCT Search Report, mailed Apr. 21, 2006, PCT/US2005/039317.

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