Electrical computers and digital processing systems: processing – Processing control – Mode switch or change
Reexamination Certificate
2007-08-08
2010-11-16
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Mode switch or change
Reexamination Certificate
active
07836285
ABSTRACT:
A digital processor and method of operation utilize an alias address space to implement variable length instruction encoding on a legacy processor. The method includes storing instructions of a code sequence in memory; generating instruction addresses of the code sequence; automatically switching between a first operating mode and a second operating mode in response to a transition in instruction addresses between a first address space and a second address space, wherein addresses in the first and second address spaces access a common memory space; in the first operating mode, accessing instructions in the first address space; in the second operating mode, accessing instructions in the second address space; and executing the accessed instructions of the code sequence. Instructions of different instruction lengths may be utilized in the first and second operating modes.
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Search Report and Written Opinion mailed Nov. 21, 2008 from corresponding International Application No. PCT/US2008/008725.
“ADSP-2106x SHARC Processor User's Manual” , Analog Devices, Inc., Revision 2.1 Mar. 2004, pp. 5-9-5-17.
Giri Abhijit
Nadig Rajiv
Analog Devices Inc.
Coleman Eric
Goodwin & Procter LLP
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