Implementation of a pseudo-LRU algorithm in a partitioned cache

Details Implementation of a pseudo-LRU algorithm in a partitioned cache Implementation of a pseudo-LRU algorithm in a partitioned cache

2006-06-27

2006-06-27

Peikari, B. James (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S160000, C711S133000, C711S134000, C711S159000, C707S793000

Reexamination Certificate

active

07069390

ABSTRACT:
The present invention provides for a plurality of partitioned ways of an associative cache. A pseudo-least recently used binary tree is provided, as is a way partition binary tree, and signals are derived from the way partition binary tree as a function of a mapped partition. Signals from the way partition binary tree and the pseudo-least recently used binary tree are combined. A cache line replacement signal is employable to select one way of a partition as a function of the pseudo-least recently used binary tree and the signals derived from the way partition binary tree.

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