Implanted isolation structure formation for high density CMOS in

Details Implanted isolation structure formation for high density CMOS in Implanted isolation structure formation for high density CMOS in

1997-03-05

1999-11-02

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Recessed oxide by localized oxidation

438439, 438294, 438528, H01L 2176

Patent

active

059769521

ABSTRACT:
A semiconductor process in which oxygen is selectively implanted into isolation regions of a semiconductor substrate and subsequently annealed to form isolation structures within the isolation regions. Preferably, a semiconductor substrate is provided and a pad oxide layer is deposited on the semiconductor substrate. A barrier layer is then deposited on the pad oxide layer and a photoresist layer is formed over the barrier layer and patterned to form a photoresist mask. The photoresist mask is aligned over active regions of the semiconductor substrate. An oxygen bearing species is then introduced to an isolation region of the semiconductor substrate. The isolation region is laterally displaced between the active regions. The introducing of the oxygen bearing species into the isolation region results in the formation of an oxygenated region of the semiconductor substrate. Thereafter, the semiconductor substrate is annealed to react the oxygen bearing species with the semiconductor substrate atoms within the isolation region thereby forming an isolation oxide within the isolation region. The introduction of the oxygen bearing species into the semiconductor substrate preferably is accomplished by implanting oxygen ions into the substrate. In one embodiment the annealing of the semiconductor substrate is accomplished by immersing the semiconductor substrate in an ambient maintained at a temperature in the range of approximately 600.degree. C. to 900.degree. C. for a duration in the range of approximately 2 to 20 minutes. In another embodiment, the annealing the semiconductor substrate is accomplished during subsequent fabrication processing such that the annealing requires no dedicated processing step.

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