Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Patent
1997-04-01
2000-01-25
Dutton, Brian
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
H01L 2131, H01L 21469
Patent
active
060178299
ABSTRACT:
The present invention is directed toward the formation of implanted thermally and electrically conductive structures in a dielectric. An electrically conductive structure, such as an interconnect, is formed through ion implantation into several levels within a dielectric layer to penetrate into an electrically conductive region beneath the dielectric layer, such as a semiconductor substrate. Ion implantation continues in discreet, overlapping implantations of the ions from the electrical conductive region up to the top of the dielectric layer so as to form a continuous interconnect. Structural qualities achieved by the method of the present invention include a low interconnect-conductive region resistivity and a low thermal-cycle stress between the interconnect and the dielectric layer in which the interconnect has been implanted. Implantation elements are selected in connection with dielectric materials so that heat treatment will cause continuous metallic structures to form within the interconnect implantation area. In an alternative embodiment, implantation dosages and depths are selected to form a thermally conductive structure that is entirely insulated within the dielectric layer and that function as a conduit to heat-sink structures.
REFERENCES:
patent: 4088799 (1978-05-01), Kurtin
patent: 4906591 (1990-03-01), Okumura
patent: 5232863 (1993-08-01), Roberts
patent: 5317197 (1994-05-01), Roberts
patent: 5726805 (1998-03-01), Kaushik et al.
Dutton Brian
Micro)n Technology, Inc.
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