Implantation process in semiconductor fabrication

Details Implantation process in semiconductor fabrication Implantation process in semiconductor fabrication

2007-02-06

2007-02-06

Dang, Trung (Department: 2823)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Ion implantation of dopant into semiconductor region

C438S529000, C438S530000

Reexamination Certificate

active

11122713

ABSTRACT:
A semiconductor device is formed by performing an amorphizing ion implantation to implant dopants of a first conductivity type into a semiconductor body. The first ion implantation causes a defect area (e.g., end-of-range defects) within the semiconductor body at a depth. A non-amorphizing implantation implants dopants of the same conductivity type into the semiconductor body. This ion implantation step implants dopants throughout the defect area. The dopants can then be activated by heating the semiconductor body for less than 10 ms, e.g., using a flash anneal or a laser anneal.

REFERENCES:
patent: 5770845 (1998-06-01), Hjelmvik
patent: 5795808 (1998-08-01), Park
patent: 5908307 (1999-06-01), Talwar et al.
patent: 6087209 (2000-07-01), Yeap et al.
patent: 6380044 (2002-04-01), Talwar et al.
patent: 6555439 (2003-04-01), Xiang et al.
patent: 6680250 (2004-01-01), Paton et al.
patent: 6690071 (2004-02-01), Sambonsugi et al.
patent: 6727136 (2004-04-01), Buller et al.
patent: 6936505 (2005-08-01), Keys et al.
patent: 7064373 (2006-06-01), Goebel et al.
patent: 2001/0041432 (2001-11-01), Lee
patent: 2003/0013260 (2003-01-01), Gossmann et al.
patent: 2003/0098490 (2003-05-01), Borland et al.
patent: 2004/0087120 (2004-05-01), Feudel et al.
patent: 2004/0235280 (2004-11-01), Keys et al.
patent: 2005/0026403 (2005-02-01), Lee et al.
patent: WO 03/063218 (2003-07-01), None
Liu, C.T., et al., “Manufacturable Shallow-Junction Processes to Overcome Defect Formation and Dopant Reactions for Sub-0.18 μm CMOS Technologies,” 1997 Symposium on VLSI Technology Digest of Technical Papers, 1997, pp. 91-92.
Cowern, N.E.B., et al., “Physics-Based Diffusion Simulations for Preamorphized Ultrashallow Junctions,” Proc. Materials Research Society Spring Meeting, Spring 2003, pp. 6 total.

Affiliated with

Also associated with

Rating

Implantation process in semiconductor fabrication does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Implantation process in semiconductor fabrication, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Implantation process in semiconductor fabrication will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3867009