Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-10-10
2006-10-10
Parker, Kenneth (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S392000, C257S355000, C257S546000, C257S336000, C257S344000, C257SE21443
Reexamination Certificate
active
07119405
ABSTRACT:
An implantation method to improve ESD robustness of thick-oxide grounded-gate NMOSFET's in deep-submicron CMOS technologies. Based on standard process flow in DGO, a thick gate-oxide ESD device is improved. Instead of using the standard I/O device, the ESD device uses the thin-oxide N-LDD implantation, and thus its ESD robustness is enhanced. This is performed by updating the logic Boolean operations of thick gate-oxide and thin gate-oxide N-LDD before fabricating the masks. In TGO, the intermediate-oxide ESD uses thin-oxide N-LDD implantation, and the thick-oxide ESD uses intermediate-oxide N-LDD implantation.
REFERENCES:
patent: 5374565 (1994-12-01), Hsue et al.
patent: 5627527 (1997-05-01), Mehta
patent: 6143594 (2000-11-01), Tsao et al.
patent: 6882011 (2005-04-01), Chen
patent: 6972446 (2005-12-01), Atsumi
patent: 2002/0127791 (2002-09-01), Nanjo et al.
patent: 2003/0173630 (2003-09-01), Lin et al.
patent: 2005/0275028 (2005-12-01), Steinhoff
Chen Jau-Wen
Huh Yoon
Li Erhong
Fenty Jesse A.
LSI Logic Corporation
Parker Kenneth
Trexler Bushnell Giangiorgi & Blackstone Ltd.
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