Implantation at elevated temperatures for amorphization...

Details Implantation at elevated temperatures for amorphization... Implantation at elevated temperatures for amorphization...

2002-07-11

2004-03-09

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Ion implantation of dopant into semiconductor region

C438S522000, C438S604000, C438S766000, C438S767000, C438S933000

Reexamination Certificate

active

06703293

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to devices for high speed CMOS integrated circuits, and specifically to fabrication of a SiGe film at an elevated temperature by providing a layer of tensile strained silicon on a relaxed Si
1−x
Ge
x
layer to speed switching speeds for nMOS and pMOS transistors.
BACKGROUND OF THE INVENTION
There are many publications describing a thick layer of Si
1−x
Ge
x
with graded Ge composition (x) followed by a thick relaxed Si
1−x
Ge
x
layer of constant x capped by a thin silicon film under tensile strain, which is used for fabricating high drain drive current MOS transistors. Because of the lattice parameter mismatch between the Si
1−x
Ge
x
layers and the silicon substrate there is a high density of misfit dislocations at the SiGe/Si substrate interface, accompanied by numerous threading dislocations in the SiGe some of which propagate all the way to the surface. The total SiGe thickness is on the order of several microns and the density of threading dislocations at the surface is still on the order of 1·10
5
cm
−2
. A partial list of the relevant publications is given in related Application 1. However, the very thick Si
1−x
Ge
x
layer, and the high defect density of this conventional Si
1−x
Ge
x
process is not applicable for large-scale IC fabrication.
As is demonstrated in S. Mantl et al.,
Strain relaxation of epitaxial SiGe layer on Si
(100)
improved by hydrogen implantation
, Nuclear Instruments and Methods in Physics Research B vol. 147, 29 (1999), and expanded upon in related Applications 1 and 2, strain relaxed high quality Si
1−x
Ge
x
layers on silicon can be obtained by hydrogen ion implantation and annealing. Hydrogen ion implantation forms a narrow defect band slightly below the SiGe/Si interface. During subsequent annealing hydrogen platelets and cavities form, nucleating misfit dislocations and giving rise to strong enhanced strain relaxation in the Si
1−x
Ge
x
epilayer. Hydrogen ions may also terminate some threading dislocations, preventing them from propagating toward the Si
1−x
Ge
x
surface. Related Applications 1 and 2 describe methods to reduce defect density and fabricate high drive current MOS transistors on a relaxed Si
1−x
Ge
x
film having thickness on the order of only 300 nm. However, the defect density of the Si
1−x
Ge
x
film by these processes is still not suitable to very large-scale integrated circuit fabrication.
Related Application 3 describes a means to further reduce the defect density in Si
1−x
Ge
x
films. In the method described in that Application, a buried amorphous region in the film is fabricated, e.g., with Si
+
ion implantation, and then recrystallized through solid phase epitaxy (SPE) using as the seed the undamaged crystalline Si
1−x
Ge
x
region at the surface. However, the process window for making a buried amorphous region in SiGe may be rather narrow, because it has been consistently reported that SiGe is much more easily damaged by Si
+
ion implantation than silicon, A. N. Larsen et al.,
MeV ion implantation induced damage in relaxed
Si
1−x
Ge
x
, J. Appl. Phys., vol. 81, 2208 (1997); T. E. Haynes, et al.,
Damage accumulation during ion implantation of unstrained
Si
1−x
Ge
x
alloy layers
, Appl. Phys. Lett., vol. 61, 61 (1992); and D. Y. C. Lie, et al.,
Damage and strain in epitaxial Ge
x
Si
1−x
films irradiated with Si
, J. Appl. Phys. Vol. 74, 6039 (1993). The critical dose for amorphization, (&phgr;
c
) decreases with increasing Ge concentration. This holds true for both strained and relaxed SiGe. This effect is thought to be due to both an increase in the average energy density per ion deposited in the collision cascade and a stabilization of the damage through a reduction of defect mobility in SiGe, Lie et al. and Haynes et al. To overcome this problem, related Application 5 describes the use of a thin silicon cap layer which acts as a crystalline seed for solid phase epitaxial regrowth of the underlying amorphized SiGe film. Because the silicon cap will experience considerably less damage from the Si
+
implant than the SiGe it should make a better template for the regrown crystal.
However, SPE of amorphized strained SiGe with more than 10% Ge has been observed to result in a heavily defected film, containing microtwins and stacking faults, which have been explained as a stress relief mechanism, D. C. Paine, et al.,
The growth of strained Si
1−x
Ge
x
alloys on
(001)
silicon using solid phase epitaxy
, J. Mater. Res., vol. 5, 1023 (1990), and C. Lee, et al.,
Kinetics of solid phase epitaxial regrowth in amorphized
Si
0.88
Ge
0.12
measured by time
-
resolved reflectivity
, Appl. Phys. Lett., vol. 62, 501 (1993). Correspondingly, it has been reported that SPE of relaxed SiGe amorphized by Si
+
ion implantation results in a much better crystal than SPE of strained SiGe, Q. Z. Hong, et al.,
Solid phase epitaxy of stresses and stress
-
relaxed Ge
-
Si alloys
, J. Appl. Phys. Vol. 71, 1768 (1992). Furthermore, the SPE recrystallization rate of strained SiGe is slower than that of silicon while the rate for relaxed SiGe is higher, which is attributed to changes in the activation barrier for SPE, Hong et al.
There is also a strong dependence on the wafer temperature during ion implantation, T
I
, with the damage decreasing at higher T
I
, so &phgr;
c
will depend on temperature, Haynes et al. This is thought to be due to the increased mobility at higher temperatures of the defects resulting from implantation, Haynes et al.; D. Y. C. Lie, et al.,
Dependence of damage and strain on the temperature of Si irradiation in epitaxial Ge
0.10
Si
0.90
films on Si
(100), J. Appl. Phys. Vol. 77, 2329 (1995); and O. W. Holland, et al.,
Damage saturation during high
-
energy ion implantation of Si
1−x
Ge
x
, Appl. Phys. Lett., vol. 61, 3148 (1992). This is reported to be a strong effect, occurring fairly abruptly, so that the same implant, e.g., 1·10
15
Si
+
ions at 320 keV, will amorphize Si
0.9
Ge
0.1
at T
I
=60° C., but barely damage the lattice at 100° C., Lie, et al., supra. Also, at elevated T
I
, the damage may depend on dose rate as well as total dose, Haynes et al. Another effect reported to occur at elevated wafer temperatures is saturation of the damage during Si
+
ion implantation, Holland et al. If Si
+
ions are implanted into Si, SiGe, or Ge at T
I
greater than some critical value, T
c
, the surface damage will not rise above a relatively low value no matter what the dose; i.e., it saturates. Meanwhile, as the dose is increased the end-of-range (EOR) damage grows until a buried amorphous region is produced. However, if T
I
is too high, it may not be possible to produce an amorphous region, regardless of dose, Haynes et al. If the implant is performed at T
I
below T
c
, the damage in both the surface region and EOR will increase with dose. Consequently, there is expected to be an optimum temperature range for T
I
which allows fabrication of a buried amorphous region while preserving a crystalline surface layer. T
c
is composition dependent: e.g. ~24° C., 69° C., 133° C., and 114° C. for Si, 15% Ge, 50% Ge, and 100% Ge, at a 1.25 meV implant energy, respectively, Holland et al. The method of the invention described herein makes use of these temperature effects to preserve the crystal quality of the surface region during Si
+
or Ge
+
ion implantation of SiGe while producing a buried amorphous region. By so doing a better quality crystal can be fabricated after solid phase epitaxial regrowth.
SUMMARY OF THE INVENTION
A method of fabricating a Si
1−X
Ge
X
film on a silicon substrate includes preparing a silicon substrate; epitaxially depositing a Si
1−X
Ge
X
layer on the silicon substrate forming a Si
1−X
Ge
X
/Si interface there between; amorphizing the Si
1−X
Ge
X
layer at a temperature greater than T
c
to form an amorphous, SiGe layer; and annealing the stru

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