Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2009-08-31
2010-11-16
Cho, James (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S031000, C365S063000
Reexamination Certificate
active
07834655
ABSTRACT:
An impedance matching device for memory signals includes a resistor array and a switch device. A number of first pins at a first side of the resistor array are connected to control signal pins and/or address signal pins of a memory socket on a motherboard. A number of second pins are extended at a second side of the resistor array. The switch device connects or disconnects the plurality of second pins of the resistor array to or from a power supply on the motherboard.
REFERENCES:
patent: 6308232 (2001-10-01), Gasbarro
patent: 7009863 (2006-03-01), Khatri et al.
patent: 7180327 (2007-02-01), So et al.
Cho James
Hon Hai Precision Industry Co. Ltd.
Hong Fu Jin Precision Industry ( ShenZhen) Co., Ltd.
Ma Zhigang
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