Impedance control circuit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

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Details

333 173, 326 86, 327316, H03K 190175, H03K 19003

Patent

active

060878479

ABSTRACT:
Briefly, in accordance with one embodiment of the invention an integrated circuit includes: a digital feedback control circuit to adjust the impedance of an interface circuit output buffer based, at least in part, on having adjusted the impedance of a non-data signal output buffer coupled to an external impedance. Briefly, in accordance with another embodiment of the invention, a method of digitally adjusting the impedance of an interface circuit output buffer comprises: digitally adjusting the impedance of a non-data signal output buffer coupled to an external impedance, and digitally adjusting the impedance of the interface circuit output buffer based, at least in part, on the digitally adjusted impedance of the non-data signal output buffer.

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DeHon, A., T. Knight, Jr., and T. Simon, "Automatic Impedance Control", ISSCC Digest of Technical Papers, Feb. 1993, pp. 164-165.
Gabara, T.J. and S.C. Knauer, "Digitally Adjustable Resistors in CMOS for High-Performance Applications", IEEE Journal of Solid State Circuits, vol. 27, No. 8, Aug. 1992, pp. 1176-1185.
Knight, Jr., T.F. and A. Krymm, "A Self-Terminating Low-Voltage Swing CMOS Output Driver", IEEE Journal of Solid State Circuits, vol. 23, No. 2, Apr. 1988, pp. 457-464.
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