Impedance calibration period setting circuit and...

Details Impedance calibration period setting circuit and... Impedance calibration period setting circuit and...

2009-06-29

2010-10-26

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S032000

Reexamination Certificate

active

07821292

ABSTRACT:
An impedance calibration period setting circuit includes a command decoder and an impedance calibration activation signal generator. The command decoder combines external signals to generate a refresh signal. The impedance calibration activation signal generator is configured to generate an impedance calibration activation signal in response to the refresh signal and an address signal. The impedance calibration period setting circuit prevents abnormal changes in an impedance calibration code and reduces current consumption.

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