Impedance adjustment circuit

Details Impedance adjustment circuit Impedance adjustment circuit

2010-05-27

2011-10-18

Ismail, Shawki (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C327S108000, C365S189050

Reexamination Certificate

active

08040150

ABSTRACT:
An impedance adjustment circuit according to the present invention includes a first input buffer which detects that an input signal exceeds VREFA, a second input buffer which detects that the input signal exceeds VREFB, VREFB being higher than VREFA, a counter circuit A which performs count based on an output from the first input buffer, a counter circuit B which performs count based on an output from the second input buffer, and a termination resistor control circuit which controls impedance of a termination resistor provided in a termination of a transmission path based on the count in the counter circuit A and the count in the counter circuit B.

REFERENCES:
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patent: 6836143 (2004-12-01), Song
patent: 7342412 (2008-03-01), Kim
patent: 2002/0050838 (2002-05-01), Kim et al.
patent: 2002/0196049 (2002-12-01), Yanagawa
patent: 2007/0103189 (2007-05-01), Chang et al.
patent: 2000-209078 (A) (2000-07-01), None
patent: 2005-61976 (A) (2005-03-01), None
patent: 2005-229552 (A) (2005-08-01), None
patent: 2006-203568 (A) (2006-08-01), None

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