Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2001-09-26
2003-04-29
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S032000, C326S034000
Reexamination Certificate
active
06556039
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an impedance adjustment circuit which can adjust an input impedance on a data reception side of a data transmission system having a plurality of data transmission channels. More particularly, this invention relates to an impedance adjustment circuit which is frequently used in a differential output circuit for TMDS (Transmission Minimized Differential Signaling).
BACKGROUND OF THE INVENTION
The configuration of a conventional data transmission system for adjusting an input impedance on a data reception side is shown in FIG.
10
. In general, when propagation delay times of a transmission line is longer at the leading edge of a signal than at the trailing edge of the signal, the transmission line is treated as a distributed constant line. In this case, it is necessary to considered the influence of noise generated due to reflections or the like.
FIG. 11
is a diagram showing the configuration of a data transmission system which suppresses reflections. In order to obtain impedance matching, for example, a termination resistor is used as illustrated in FIG.
11
. When there is a match between the output impedance (Z
1
) of the transmission-side device, characteristic impedance (Z
0
) of the transmission line, and termination resistance (ZL), reflections should not occur.
However, in the conventional data transmission system, data buses of a transmission-side device and a reception-side device are frequently constituted by multi-bit buses such as 8-bit buses or 16-bit buses. For this reason, termination resistors are added to all the input terminals of the reception-side device. As a result, the number of elements on the substrate disadvantageously increases. Thus, cost of the system increases, and mounting area on the substrate increases.
On the other hand, when termination resistors are incorporated in the reception-side device to solve the above problem, the resistors incorporated in the device generally vary in manufacture. For this reason, impedance mismatching caused by the variations in manufacture occurs disadvantageously. In this case, since the resistances have specific values, a problem that this device cannot be used in systems having different characteristic impedances of transmission lines is posed.
SUMMARY OF THE INVENTION
It is an object of this invention to obtain an impedance adjustment circuit which can absorb the variations of internal resisters in manufacture even though terminal resistors are incorporated in a reception-side device and which can realize optimum impedance matching.
The impedance adjustment circuit according to one aspect of this invention comprises a reception-side semiconductor device including at least a terminal resister, the impedance adjustment circuit achieving impedance matching between the terminal resister and a transmission line; and a reference resistor provided externally to the reception-side semiconductor device, the reference resistor having a first resistance which is in proportion to an impedance of the transmission line. The terminal resistor is constituted by a resistor having a second resistance and an ON resistor of a MOS transistor. Resistance of the terminal resistor is adjusted by referring to the reference resistor.
The impedance adjustment circuit according to another aspect of this invention comprises a reception-side semiconductor device including at least a terminal resister, the impedance adjustment circuit achieving impedance matching between the terminal resister and a transmission line; and a reference resistor provided externally to the reception-side semiconductor device, the reference resistor having a first resistance which is in proportion to an impedance of the transmission line. The terminal resistor is constituted by an ON resistor of a MOS transistor. Resistance of the terminal resistor is adjusted by referring to the reference resistor.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.
REFERENCES:
patent: 5726582 (1998-03-01), Hedberg
patent: 6288564 (2001-09-01), Hedberg
patent: 6414512 (2002-07-01), Moyer
patent: 7-202674 (1995-08-01), None
patent: 409482 (2000-10-01), None
Miki Takahiro
Nagano Hideo
Mitsubishi Denki & Kabushiki Kaisha
Tokar Michael
Tran Anh Q.
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