Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-09-05
2004-11-23
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S644000, C438S628000, C257S751000, C257S767000
Reexamination Certificate
active
06821886
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method for the creation of a barrier layer for a tungsten interconnect.
(2) Description of the Prior Art
Conventional methods of creating a tungsten interconnect, such as a tungsten plug in a via or contact, follows procedures of first creating an opening in a layer of dielectric by for instance plasma etching of the layer of dielectric, the removal of the via or contact exposure mask followed by a thorough surface clean, the deposition of an adhesion layer and a barrier layer preferably by methods of Physical Vapor Deposition (PVD) and a final step of tungsten deposition, preferably by Chemical Vapor Deposition (CVD).
Typically, Ti is used for the adhesion layer while TiN is used for the barrier layer. Tungsten is typically deposited using a tungsten hexafluoride (WF
6
) gas. The barrier layer of TiN is deposited over a layer of Ti, the TiN barrier serves as a protective layer against the tungsten hexafluoride (WF
6
) gas and the adhesion layer of Ti during tungsten deposition. The adhesion layer of Ti improves the adhesion of overlying metal films to the oxide of the surrounding dielectric of the via holes.
It is well known in the art that a layer of TiN that is deposited at low temperatures suffers from a relatively high resistivity, typically in excess of about 1,200 &mgr;m-cm. This high resistance is undesirable for obvious reasons of having a negative impact on device performance. Porosity and high oxygen content of the low-temperature created layer of TiN appear at this time to be the major contributors to the high resistance of the deposited layer of TiN.
Continuous reduction in device dimensions makes the creation of a conductive interconnect ever more challenging. Tungsten is frequently used for the creation of the conductive interconnect. The creation of high-performance semiconductor devices, with their inherent requirements of reduction of the dimensions of device features and the therefrom following increase in device density, lead to the creation of a relatively thicker layer of TiN as a barrier layer.
With increased thickness of the deposited layer of TiN, the temperature of the substrate increases during the deposition of the layer of TiN. If the relatively thick layer of TiN is deposited in one pass (one processing step), the temperature of the substrate may increase to the point where metal extrusion takes place. It is therefore desirable to provide a method whereby a relatively thick layer of barrier material can be created without suffering a negative impact of increasing temperatures of the substrate during barrier layer deposition.
U.S. Pat. No. 6,326,690 B2 (Wang et al.) shows a Ti/TiN stack process.
U.S. Pat. No. 6,297,555 B1 (Zhao et al.) shows a two-step TIN barrier process.
U.S. Pat. No. 6,043,148 (Peng et al.) reveals a TiN process.
U.S. Pat. No. 6,140,223 (Kim et al.) shows a multi-layer TiN barrier layer process.
SUMMARY OF THE INVENTION
A principal objective of the invention is to provide a method of creating a barrier layer for a tungsten interconnect.
Another objective of the invention is to provide a method for the creation of a barrier layer for a tungsten interconnect whereby effects of temperature increase are minimized.
Yet another objective of the invention is to provide a method for the creation of a barrier layer for a tungsten interconnect without introducing metal extrusion.
In accordance with the objectives of the invention a new method is provided for the creation of an adhesion/barrier layer over which a tungsten interconnect is created. The invention reduces metal extrusion and effects of pin-holes by dividing the process of barrier material of TiN deposition into two phases, whereby after about half the thickness of the required layer of TiN has been deposited, an intermediate and very thin layer of Ti is deposited. After the thin layer of Ti has been deposited, the deposition of the barrier layer of TiN is continued to the point where the required thickness for the layer of TiN has been reached.
REFERENCES:
patent: 6043148 (2000-03-01), Peng et al.
patent: 6140223 (2000-10-01), Kim et al.
patent: 6214742 (2001-04-01), Shields et al.
patent: 6297555 (2001-10-01), Zhao et al.
patent: 6326690 (2001-12-01), Wang et al.
patent: 6410986 (2002-06-01), Merchant et al.
Layadi Nace
Lim Jovin
Maury Alvaro
Chartered Semiconductor Manufacturing Ltd.
Lee Calvin
Pike Rosemary L. S.
Saile George O.
Smith Matthew
LandOfFree
IMP TiN barrier metal process does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with IMP TiN barrier metal process, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and IMP TiN barrier metal process will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3336870