IML-stream generated error insertion / FRU isolation

Details IML-stream generated error insertion / FRU isolation IML-stream generated error insertion / FRU isolation

2006-09-12

2006-09-12

Beausoliel, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S703000

Reexamination Certificate

active

07107490

ABSTRACT:
The present invention relates to a method and system for testing error detection programs dedicated for detecting hardware failures in a computer system, in which error case patterns comprising stimuli values are generated and response patterns to the hardware are evaluated. In order to develop and debug such error detection programs already at an early phase during hardware development it is proposed to feed a simulation model (26) of said hardware with said error patterns, and after running said model, evaluating (12) the model response patterns generated by the simulation model and comparing the response patterns with those expected as a result of the error detection program.

REFERENCES:
patent: 5140593 (1992-08-01), Hayashi
patent: 5229999 (1993-07-01), Cushing et al.
patent: 5574853 (1996-11-01), Barch et al.
patent: 5757811 (1998-05-01), Kenmoku et al.
patent: 6539503 (2003-03-01), Walker

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