Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-03-09
2002-10-15
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S291000, C257S233000, C257S459000, C257S059000, C257S072000
Reexamination Certificate
active
06465824
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention generally relates to light-sensitive imaging arrays. More particularly, the present invention relates to sealing of exposed edges of organic dielectric layers to prevent undercutting of the organic dielectric layers from adversely affecting imager performance and reliability.
Photosensitive element arrays for converting incident radiant energy into an electrical signal are commonly used in imaging applications, for example, in x-ray imagers and facsimile device arrays. Hydrogenated amorphous silicon (a-Si) and alloys of a-Si are commonly used in the fabrication of photosensitive elements for such arrays due to the advantageous characteristics of a-Si and the relative ease of fabrication. In particular, photosensitive elements, such as photodiodes, can be formed from such materials in conjunction with necessary control or switching elements, such as thin film transistors (TFTs), in relatively large arrays.
X-ray imagers, for example, are formed on a substantially flat substrate, typically glass. The imager includes an array of pixels with light-sensitive imaging elements, typically photodiodes, each of which has an associated switching element, such as a TFT or one or more additional addressing diodes. In conjunction with a scintillator, x-rays are transformed into visible light for imaging with the photosensitive elements. The photosensitive elements, typically photodiodes, are connected at one surface to a switching device, typically a thin-film transistor, and at the other surface to a common electrode which contacts all the photodiodes in parallel. The array is addressed by a plurality of row and column address lines having contact pads located along the sides of the array. In operation, the voltage on the row lines, and hence the TFTs, are switched on in turn, allowing the charge on that scanned line's photodiodes to be read out via the column address lines, which are connected to external amplifiers. The row address lines are commonly referred to as “scan lines” and the column address lines are referred to as “data lines.” The address lines are electrically contiguous with contact fingers which extend from the active region toward the edges of the substrate, where they are in turn electrically connected to contact pads. Connection to external scan line drive and data line read out circuitry is made via the contact pads.
The common electrode, which is disposed over the top of the photodiode array provides electrical contact to the photodiode array. The photodiode array is typically overlaid with a first layer of inorganic and a second layer of organic polymer dielectric, as disclosed in U.S. Pat. No. 5,233,181, issued on Aug. 3, 1993 to Kwansnick (sic) et al. Contact vias are formed over the photodiodes in each dielectric layer to allow electrical contact to the photodiode tops by the common electrode.
Patterning of the common electrode comprises deposition, photolithography and photoresist strip, as is well known in the art. For light imagers comprising amorphous silicon, it is observed that the vias, necessary for electrical connection between the contact pads and the contact fingers, may be damaged if the photoresist is removed by a wet strip process, degrading the imager. Therefore, dry strip of the common electrode photoresist is generally used, for example, by ashing with a plasma containing O
2
. However, the dry strip also etches the underlying organic polymer, causing undercut of its edges under those of the common electrode. A barrier layer is typically disposed on the imager after common electrode formation, for example, see U.S. Pat. No. 5,401,668, issued Mar. 28, 1999 to Kwasnick et al., and this common electrode overhang results in poor step coverage of the barrier layer, causing degraded environmental protection and possible photodiode leakage. Thus, a need exists to address the undercutting problem.
It is desirable that the imager structure be robust both for withstanding the fabrication process and good performance in operation. As higher performance is required of imagers (e.g., noise, resolution, etc.), the necessity arises of greater patterning of the imager structure to provide the desired performance in operation and ability to withstand the rigors of fabrication and usage.
SUMMARY OF THE INVENTION
In one example of the present invention, a structure and a method of forming the structure for an imager is presented. The structure comprises an organic dielectric layer, and a common electrode, comprising a light-transmissive conductive layer, the common electrode covering the organic dielectric layer and extending beyond an exposed edge of the organic dielectric layer along a “striped” segment of the common electrode.
REFERENCES:
patent: 5233181 (1993-08-01), Kwansnick et al.
patent: 5401668 (1995-03-01), Kwasnick et al.
patent: 5517031 (1996-05-01), Wei et al.
patent: 5714790 (1998-02-01), Sakamoto
patent: 5777355 (1998-07-01), Possin et al.
patent: 6232626 (2001-05-01), Rhodes
patent: 2001/0006238 (2001-07-01), Han et al.
patent: 405136385 (1993-06-01), None
Kwasnick Robert Forrest
Liu Jianqiang
Possin George Edward
General Electric Company
Hale Lester R.
Ingraham Donald S.
Lee Eddie
Nguyen Joseph
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