Computer graphics processing and selective visual display system – Computer graphics display memory system – Row buffer
Reexamination Certificate
2006-12-05
2010-02-09
Hsu, Joni (Department: 2628)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Row buffer
C345S502000, C345S530000
Reexamination Certificate
active
07659908
ABSTRACT:
An image processing circuit comprising a plurality of line buffers is provided. Each line buffer stores pixel data of a plurality of pixels as line data, the plurality of pixels configuring a single image line of an image. A first image processing part performs a first image processing task on original image data provided from the exterior by using the line data stored in at least one of the line buffers, and provides processed image data. A second image processing part performs a second image processing task on the processed image data provided from the first image processing part by using the line data stored in at least one of the line buffers, and provides processed image data. A line buffer selector selectively connects the first image processing part and the second image processing part to any number of line buffers. An output path selector selects one of an output path that skips the second image processing task and an output path that performs the second image processing task.
REFERENCES:
patent: 5161229 (1992-11-01), Yasui et al.
patent: 5301338 (1994-04-01), Yamaura et al.
patent: 5473444 (1995-12-01), Sakano et al.
patent: 5511173 (1996-04-01), Yamaura et al.
patent: 5594890 (1997-01-01), Yamaura et al.
patent: 5596761 (1997-01-01), Yoshioka et al.
patent: 5606709 (1997-02-01), Yoshioka et al.
patent: 5630158 (1997-05-01), Hara et al.
patent: 5696957 (1997-12-01), Yamaura et al.
patent: 5715336 (1998-02-01), Tanaka
patent: 5938758 (1999-08-01), Katayama et al.
patent: 6084686 (2000-07-01), Ushida
patent: 6091859 (2000-07-01), Sonobe et al.
patent: 6175890 (2001-01-01), Yamaura
patent: 6189086 (2001-02-01), Yamaura
patent: 6266756 (2001-07-01), Hara et al.
patent: 6662295 (2003-12-01), Yamaura
patent: 6853385 (2005-02-01), MacInnis et al.
patent: 2001/0008563 (2001-07-01), Yamaura et al.
patent: 2002/0105676 (2002-08-01), Fujiwara et al.
patent: 06149994 (1994-05-01), None
patent: 07044696 (1995-02-01), None
patent: 7-123337 (1995-05-01), None
patent: 7-271958 (1995-10-01), None
patent: 10340340 (1998-12-01), None
patent: 2000-312327 (2000-11-01), None
patent: 2001-283211 (2001-10-01), None
U.S. Appl. No. 09/658,860, filed Sep. 8, 2000.
Mar. 4, 2008 Japanese official action in connection with corresponding Japanese application No. 2002-053734.
Cooper & Dunham LLP
Hsu Joni
Ricoh & Company, Ltd.
Tung Kee M
LandOfFree
Image processing circuit, combined image processing circuit,... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Image processing circuit, combined image processing circuit,..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Image processing circuit, combined image processing circuit,... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4150209