Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller
Reexamination Certificate
2005-07-26
2005-07-26
Tung, Kee M. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Graphic display memory controller
C345S574000
Reexamination Certificate
active
06922195
ABSTRACT:
An image processing apparatus includes a memory circuit, one-line judging circuit, a write control circuit and a read control circuit. The memory circuit stores an input data in response to a write address and outputs an output data in response to a read address. The one-line judging circuit receives a horizontal synchronization signal and a sampling clock signal and compares a number of pixels sampled within one line of the horizontal synchronization signal with a predetermined number so as to output a comparison signal and a difference signal representing a difference between the sampled number and a predetermined number. The write control circuit generates the write address in response to the clock signal and the comparison signal, and a read control signal in response to the comparison signal. The read control circuit generates the read address in response to the write address, the read control signal and the difference signal.
REFERENCES:
patent: 5666458 (1997-09-01), Moon et al.
patent: 6239729 (2001-05-01), Takeuchi
patent: 6590616 (2003-07-01), Takeuchi
patent: 2002/0011985 (2002-01-01), Nakano et al.
Akiyama Takaaki
Satoh Yasunori
Rabin & Berdo PC
Tung Kee M.
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