Image processing apparatus

Image analysis – Image compression or coding – Lossless compression

Reexamination Certificate

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Details

C382S245000, C382S246000

Reexamination Certificate

active

06236759

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image processing apparatus for processing a image data or the encoded data thereof, and more sectionicularly to an image processing apparatus for compressing image data, expanding image encoded data, converting image data (scaling) and converting from the image encoded data to other code required in a facsimile or the like.
2. Description of the Related Art
Such kind of image processing apparatus is required in a facsimile, other image communication device, image filing system or the like.
An example of a conventional facsimile is shown in FIG.
2
. In this facsimile, two kinds of coding/decoding device
201
and
203
are used for expansion of received encoded data or reduction of image data. The standardized MH, MR and MMR cording are executed by the coding/decoding device
201
as an encoding which is adapted to document image data. On the other hand, QM encoding which is arithmetic code conformed to ITU recommendation T.81, which is adapted to reduction of a halftone image, is executed by the coding/decoding device
203
. A resolution conversion device
202
converts sizes of horizontal scanning and vertical scanning directions. These image processing apparatus are connected to data bus
210
and
211
, and are placed under control of a host processor
206
.
The host processor
206
selects the coding/decoding device
201
and
203
in accordance with capability of a receiving terminal to decode image data red in from a image input device
208
. The encoded data is buffered by a code memory
205
to be transmitted from a communication device
207
like a modem to a communication line. The image is reconstituted by reverse processing thereof at receiving to be send to a image recorder/display device such as a printer.
In memory communication that transmission is carried out after once storing all the encoded data to be transmitted in the code memory
205
, page size and encoding are required to be converted so as to adapt to capability of the receiving terminal (hereinafter referred to as code conversion). Typically, this code conversion function is realized as repetition of writing the image decoded at every one line in an image line memory
204
, reading therefrom to perform resolution conversion processing, writing in an image line memory
204
again and reading out again to carry out encoding processing.
However, the conventional facsimiles are constituted by the structure that a plurality of image processing apparatus that various code conversion functions and resolution conversion functions are integrated into integrated circuits separately are connected to a common bus (an external bus) and the image memory placed on the external bus are shared. Therefore, the time required for read and write of large amount of image data and encoded data is increased, whereby there is the limitation in speeding up.
SUMMARY OF THE INVENTION
This invention is made in view of the above circumstances and it is the object of the present invention to provide an image processing apparatus for carrying out at high speed reduction processing, expansion processing, image conversion processing and code conversion processing required in the a facsimile or the like.
This invention provides an image processing apparatus which comprises a plurality of coding/decoding devices performing encoding and decoding by different codes, internal memory which the each coding/decoding device shares, and a control section controlling operation of the each coding/decoding device, wherein the coding/decoding devices, internal memory and control section are integrated on one chip and encoded data are converted to the encoded data with a different form within one chip.
Moreover, the present invention provides an image processing apparatus which comprises a plurality of code-conversion device performing encoding and decoding by different codes, a control section controlling operation of the each code-conversion device, internal memory which provides line memory to the each code-conversion device, an internal bus for data transfer to the each code-conversion device and said internal memory and external bus control unit for controlling an external bus for interface with the external.
By such configuration, encoded data can be converted to the encoded data of a different form within one chip and access to image memory placed on the external bus is not required, whereby speeding up of processing can be planed.
Farther the present invention provides an image processing apparatus which comprises a plurality of code-conversion devices performing encoding and decoding by different coding/decoding system, a resolution converting device performing resolution conversion of the image, internal memory which the code-conversion device and the resolution converting device share, and a control section controlling operation of the code-conversion device and the resolution converting device are integrated on one chip and code conversion to the encoded data of a different form and resolution conversion to different resolution are performed within one chip.
And, the present invention provides an image processing apparatus which comprises a plurality of code-conversion devices performing encoding and decoding by different coding/decoding system, a resolution converting device performing resolution conversion of the image, a control section controlling operation of the each code-conversion device and the resolution converting device, internal memory which provides line memory to the each code-conversion device and the resolution converting device, an internal bus for data transfer to the code-conversion device, the resolution converting device and the internal memory and external bus control unit for controlling an external bus for interface with the external are provided.
By such configuration, a plurality of code-conversion device and resolution converting device are integrated concentrating on line memory, whereby code-conversion, conversion of page size and processing of a combination thereof can be performed flexibly and moreover at high speed.
Farther, the present invention provide an image processing apparatus which comprises a plurality of code-conversion devices including a first code-conversion device performing encoding and decoding by MH code, MR code or MMR code and a second code-conversion device performing encoding and decoding by QM code, in a code-conversion process that MH code, MR code or MMR code entered from the external bus are converted to QM code, the first code-conversion device and the second code-conversion device performing decoding processing of MH code, MR code or MMR code and encoding processing of QM code using the line memory secured in internal memory, thereby converting without sending intermediate data to the exterior.
By such configuration, each code-conversion device of MH, MR and MMR and QM being a typical encoding of a binary image is integrated concentrating on line memory, whereby decoding processing of MH code, MR code or MMR code and QM encoding processing can be performed at high speed.
Farther the present invention provide an image processing apparatus which comprises a plurality of code-conversion device comprising: a first code-conversion device performing encoding and decoding by MH code, MR code or MMR code and a second code-conversion device performing encoding and decoding by QM code, in a code conversion process that QM code entered from the external bus are converted to MH code, MR code or MMR code, the first code-conversion device and the second code-conversion device performing encoding processing of QM code and encoding processing of MH code, MR code or MMR code using the line memory in the internal memory, thereby converting without sending intermediate data to the exterior.
By such configuration, each code-conversion device of MH, MR and MMR and QM being a typical encoding of a binary image is integrated concentrating on line memory, whereby decoding processing of QM code and encoding proc

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