Image memory apparatus

Static information storage and retrieval – Read/write circuit – Simultaneous operations

Patent

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Details

36523005, 3652385, G11C 1140

Patent

active

055597408

ABSTRACT:
An image memory apparatus for storing image data which includes: plural memory cells, arranged in a one-chip memory, for inputting image data and for outputting the image data therefrom; a writing line, connected with all of the plural memory cells, for inputting the image data into the plural memory cells; a readout line, provided independent from the writing line and connected to all of the plural memory cells, for outputting the image data from the plural memory cells; a first address designating line, connected with the plural memory cells, for identifying one of the plural memory cells which is subjected to an input of the image data through the writing line; a second address designating line, provided independent from the first address designating line and connected with the plural memory cells, for identifying one of the plural memory cells which is subjected to an output of the image data through the readout line.

REFERENCES:
patent: 4521813 (1985-06-01), Yoshida
patent: 5177706 (1993-01-01), Shinohara
patent: 5398209 (1995-03-01), Iwakiri
patent: 5495444 (1996-02-01), Okubo

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