Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1994-12-22
2002-12-03
Le, Dieu-Minh (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S002000
Reexamination Certificate
active
06490692
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to image forming apparatuses, and more particularly, to an image forming apparatus having an abnormality monitoring circuit for monitoring the operation of a microprocessor which conducts processings for image forming operation.
2. Description of the Related Art
Today, most image forming apparatuses such as copying machines and printers are provided with a microprocessor which controls image forming operation. Since a microprocessor sometimes becomes uncontrollable by the influence of noise, for example, various techniques have been suggested for preventing such states. There is an apparatus in which a timer called watchdog timer is connected to a microprocessor, and if the timer does not receive a restart signal from the microprocessor within a prescribed time period until the timer is up, a reset signal is transmitted to the microprocessor to reset the microprocessor, based on the determination that the microprocessor is in an uncontrollable state.
In such an apparatus as the watchdog timer described above which resets the microprocessor in an uncontrollable state to return it to its normal operation state, the microprocessor in the uncontrollable state is simply reset, and therefore, the history that the microprocessor has attained the uncontrollable state is not stored once the microprocessor is restarted and initiates a normal operation. Therefore, with a malfunctioning microprocessor, the image forming apparatus on the whole cannot be apparently distinguished from its normal state, and the malfunctioning microprocessor may continue to be inside the image forming apparatus, which degrades the reliability of the operation of the image forming apparatus.
Furthermore, conventionally, all microprocessors are instructed to stop controlling once an abnormality occurs in a single microprocessor and the image forming apparatus immediately stops operating once such an abnormality occurs. However, this is not efficient, because control by a normal microprocessor is also stopped in the timing in which another microprocessor is encountered with an abnormality.
SUMMARY OF THE INVENTION
It is an object of the invention to improve operation reliability in an image forming apparatus whose each image forming operation is controlled by a microprocessor.
Another object of the invention is to determine a low reliability microprocessor in an image forming apparatus whose each image forming operation is controlled by a plurality of microprocessors.
Yet another object of the invention is to permit efficient controlling operation making the best of normal microprocessors even if one microprocessor suffers from an abnormality, in an image forming apparatus whose each image forming operation is controlled by a plurality of microprocessors.
In order to achieve the above-described objects, an image forming apparatus according to an aspect of the invention includes a microprocessor for conducting processings for image forming operation, and an abnormality monitoring circuit for monitoring the microprocessor and resetting the microprocessor by transmitting a reset signal to the microprocessor upon detecting an abnormality, wherein the abnormality monitoring circuit includes first storage means for storing how many times the abnormality monitoring circuit has transmitted the reset signal.
The image forming apparatus having the above-described structure is capable of storing the number of transmission of the reset signal, and therefore a low reliability microprocessor can readily be determined.
In order to achieve the above-described objects, an image forming apparatus according to another aspect of the invention includes first and second microprocessors which cooperate to control image forming operation, a monitoring circuit for monitoring the operation of the first and second microprocessors and transmitting a reset signal to a microprocessor with an abnormality and a third microprocessor, upon occurrence of an abnormality in any of the microprocessors, for determining an image forming operation controllable only by the other microprocessor and making the other microprocessor execute thus determined image operation.
The image forming apparatus having such a structure is capable of efficient controlling operation, because if one microprocessor suffers from an abnormality, an image forming operation controllable by the other microprocessor is continued. Furthermore, the image forming operation can readily be resumed after the microprocessor with the abnormality is restored.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
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Nagatani Kentaro
Nomura Keiichi
Takano Yoshiaki
Burns Doane , Swecker, Mathis LLP
Le Dieu-Minh
Minolta Co. , Ltd.
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