Electric lamp and discharge devices: systems – Cathode ray tube circuits – Cathode-ray deflections circuits
Reexamination Certificate
2000-10-24
2001-09-18
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Cathode ray tube circuits
Cathode-ray deflections circuits
C315S368270, C315S368280, C315S368250, C315S408000, C315S003000, C315S399000
Reexamination Certificate
active
06291948
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image distortion correction device for a CRT (cathode ray tube) for use in a television receiver, a display monitor and the like.
2. Description of the Background Art
In a television receiver and a display monitor which employ a CRT, a distortion known as a pincushion distortion occurs in a picture projected on a front screen by deflecting an electron beam since the front screen (phosphor screen) is near flat to result in different distances between the deflection center to the phosphor screen. Various pincushion distortion correction circuits have been proposed to correct the pincushion distortion.
The front screen which is near flat results in a greater distance from the deflection center to a peripheral part of the phosphor screen than to a central part thereof. Assuming that the front screen is a flat screen, a change in deflection current and a displacement X(t) (t is a time variation) of a bright spot position on the screen are proportional to tan &thgr; where &thgr; is a deflection angle. Thus, a peripheral elongation which is a phenomenon in which the amount of horizontal deflection increases toward the ends of the screen occurs, and a picture has a poor linearity in the peripheral part of the screen of the CRT. To correct the peripheral elongation distortion, an S-correction circuit is used which causes an S-shaped horizontal deflection current that decreases in the peripheral part to flow to reduce the horizontal deflection current in the peripheral part of the CRT face.
The required amount of correction in the S-correction circuit in the television receiver or the display monitor which employ the CRT is inversely proportional to the distance from the deflection center to each spot on the screen, and varies depending on the positions on the screen. Upper and lower parts of the CRT front screen having a large radius of curvature are farther from the deflection center than a central part thereof and accordingly requires a smaller amount of S-correction. However, conventional S-correction circuits do not particularly take the vertical correction of the screen into account to cause more excessive S-correction in the upper and lower parts of the screen than in the central part thereof, resulting in intermediate vertical lines bent in the shape of a pincushion. Such a distortion is referred to as an intermediate pin distortion (inner vertical line pincushion distortion). Conventional pincushion distortion correction circuits are not capable of completely correcting the intermediate pin distortion.
In recent years, the deflection angle has tended to increase because of the trend in the CRT front screen toward a flat shape. As compared with the CRT front screen having a large radius of curvature, the flat CRT front screen requires the entirely increased amount of S-correction and also has an increased difference between the upper and lower parts of the screen and the central part thereof in distance from the deflection center. As a result, the flat CRT front screen has more remarkable intermediate pin distortion and is required to overcome such a problem.
To correct the intermediate pin distortion, various intermediate pin distortion correction devices have been proposed, such as those disclosed in Japanese Patent Application Laid-Open No. 9-149283 (1997) and Japanese Patent Application Laid-Open No. 11-261839 (1999).
FIG. 5
is a circuit diagram showing a schematic circuit arrangement of a background art intermediate pin distortion correction device disclosed in Japanese Patent Application Laid-Open No. 11-261839. As illustrated in
FIG. 5
, a horizontal deflection current IH flows between terminals P
1
and P
2
, and a horizontal deflection coil
21
, a horizontal correction coil L
13
and a horizontal correction coil L
14
are connected in series between the terminals P
1
and P
2
. The horizontal correction coils L
13
and L
14
are wound on the same core
13
. The horizontal deflection coil
21
may be constructed in various configurations, such as a single coil and a plurality of coils connected in parallel, and thus is indicated by a block for convenience.
A vertical deflection current IV flows between terminals P
3
and P
4
, and a vertical deflection coil
22
is connected between the terminal P
3
and an intermediate terminal P
11
. The vertical deflection coil
22
may be constructed in various configurations, such as a single coil and a combination circuit of a plurality of coils connected in series and a plurality of resistors (including a variable resistor) for balance correction, and thus is indicated by a block for convenience.
The anode of a diode D
3
and a first end of a resistor R
4
are connected to the intermediate terminal P
11
. A first end of a vertical correction coil L
15
and the cathode of a diode D
4
are connected to the cathode of the diode D
3
. A second end of the resistor R
4
and a first end of a resistor R
5
are connected to a second end of the vertical correction coil L
15
. The anode of the diode D
4
and a second end of the resistor R
5
are connected to the terminal P
4
. The vertical correction coil L
15
is wound on the core
13
.
An intermediate pin distortion correction saturable reactor unit
10
comprises the horizontal correction coils L
13
, L
14
, the vertical correction coil L
15
, magnets
11
and
12
and the core
13
. The magnets
11
and
12
are disposed on the opposite ends of the core
13
so that a magnetic field is biased in one direction (leftwardly in FIG.
5
). The horizontal correction coils L
13
and L
14
are wound in opposite directions so as to generate oppositely directed magnetic fields. The vertical correction coil L
15
is wound in such a direction as to generate a magnetic field in a direction opposite from the direction of the bias applied by the magnets
11
and
12
.
The intermediate pin distortion correction saturable reactor unit
10
in the intermediate pin distortion correction device of
FIG. 5
is intended to control the inductance of the horizontal correction coils L
13
and L
14
through which the horizontal deflection current IH flows in accordance with the vertical deflection current IV flowing through the vertical correction coil L
15
, to change the amount of S-correction for horizontal deflection in accordance with the amount of vertical deflection.
More specifically, the horizontal correction coils L
13
and L
14
are connected to one end of the horizontal deflection coil
21
, and the vertical correction coil L
15
which carries the vertical deflection current IV varying in a cycle of vertical scanning (vertical cycle) generates a magnetic field directed to cancel the magnetic field biased by the magnets
11
and
12
, thereby to change the inductance of the horizontal correction coils L
13
and L
14
, performing the intermediate pin correction on the left and right sides of the screen. In this process, the horizontal deflection current IH applied to the two horizontal correction coils L
13
and L
14
is an S-corrected sawtooth current given for each horizontal scanning cycle, and the vertical deflection current IV applied to the vertical correction coil L
15
is a sawtooth current given for each vertical scanning cycle and rectified in two current paths comprised of the two diodes D
3
and D
4
and the two resistors R
4
and R
5
.
As described above, CRTs for the television receiver and the display monitor are required to prevent image quality degradation resulting from the intermediate pin distortion on the left and right sides of the screen, and various attempts to meet the requirement have been proposed. However, the background art intermediate pin distortion correction device shown in
FIG. 5
has a circuit configuration in which a vertical correction section
32
comprising a rectifier circuit having the two diodes D
3
, D
4
and the two resistors R
4
, R
5
, and the vertical correction coil L
15
is connected in series with the vertical deflection coil
22
to rectify the vertical deflec
Heishi Akinori
Ishimori Akira
Miyamoto Yoshinori
Nishino Hiroaki
Yasui Hironobu
Mitsubishi Denki & Kabushiki Kaisha
Vu Jimmy T.
Wong Don
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