Computer graphics processing and selective visual display system – Display driving control circuitry
Reexamination Certificate
2001-03-29
2004-06-08
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Display driving control circuitry
C345S670000, C345S671000, C345S672000, C345S673000, C345S182000, C345S182000, C345S111000, C345S156000, C345S156000, C345S182000, C345S182000, C345S100000
Reexamination Certificate
active
06747637
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image data processing system, and more particularly, to an image data processing system with an increased processing speed.
2. Description of the Prior Art
Image data processing systems are used in the presentation of an on screen display (OSD) on a display so that a user can adjust the height, width, luminosity, and position of the display.
Please refer to FIG.
1
.
FIG. 1
is a function block diagram of a prior art image data processing system
10
. The image data processing system
10
comprises a processor
12
, an image memory
14
, an X-axis address code register
16
, a Y-axis address code register
18
, an image width code register
20
, an image height code register
22
, an address controller
26
, a display controller
28
, and a display
30
.
In the image data processing system
10
, the processor
12
will store the X-axis position of the first pixel of the on screen display into the X-axis address code register
16
, the Y-axis position of the first pixel of the on screen display into the Y-axis address code register
18
, the width of the on screen display into the image width code register
20
, and the height of the on screen display into the image height code register
22
. The processor
12
uses the address controller
26
to store 16-bit color codes for each pixel of the on screen display into the image memory
14
. The address controller
26
stores each color code output from the processor
12
into a predetermined address of the image memory
14
according to the information from the X-axis address code register
16
, the Y-axis address code register
18
, the image width code register
20
, and the image height code register
22
.
A multiplexer
24
comprises two input ports
32
,
34
and an output port
36
. The two input ports
32
,
34
are electrically connected to an output port
38
of the image memory
14
and an external image input port
40
. The output port
36
of the multiplexer
24
is electrically connected to an input port
42
of the display
30
. The external image input port
40
is used to input an external image so that the display
30
will display an image from an external device (not shown), and the display controller
28
can control the on screen display via the multiplexer
24
so that both the on screen display and the external image overlap when shown on the display
30
.
Please refer to FIG.
2
.
FIG. 2
is a layout map showing the relation between the display
30
and the image memory
14
. A plurality of color codes is stored in the image memory
14
, and these color codes can be thought of as arrayed in a matrix. The pixels of the display
30
are also arrayed as a matrix. The color codes in the image memory
14
map onto the pixels in the display
30
. For example, the image memory
14
is a 16-megabit synchronous dynamic random access memory (16 M-bit SDRAM), and the display
30
has an SVGA resolution (800×600), as the shown in FIG.
2
. Each horizontal line of the display
30
has 800 pixels, which maps to four rows in the SDRAM
14
as each row has 256 storage cells. For example, the (X, Y) coordinates (0, 0), (256, 0), (512, 0), (768, 0), (0, 1), and (256, 1) of the display
30
map to the SDRAM (Row, Col) addresses (0, 0), (1, 0), (2, 0), (3, 0), (4, 0), and (5, 0), respectively. Because the four rows of the synchronous dynamic random access memory
14
have a total of 1024 storage cells, the resolution of the display
30
can be raised to an XGA resolution of 1024×768.
Since the image data processing system
10
has only one kind of drawing mode, it will handle each pixel of the on screen display separately. The image data processing speed is thus very slow, and the image data is quite big.
SUMMARY OF THE INVENTION
It is therefore a primary objective of the present invention to provide an image data processing system that has many kinds of drawing modes. This can increase the image data processing speed and decrease the amount of image data to solve the above mentioned problems.
In a preferred embodiment, the present invention provides an image data processing system. The image data processing system has M color code registers for storing a plurality of color codes, a first multiplexer electrically connected to every output port of the M color code registers, and a processor for storing M color codes in the M color code registers. The first multiplexer has a control port for inputting an N-bit image code. The first multiplexer chooses one of the outputs of the M color code registers as its output according to the N-bit image code. The processor periodically transmits a plurality of N-bit image codes to the control port of the first multiplexer so that the first multiplexer periodically chooses one of the color codes stored in the M color code registers as its output according to one of the N-bit image codes.
It is an advantage of the present invention that the image data processing system has different kinds of drawing modes, which increases the image data processing speed and decreases the amount of image data.
These and other objective and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
REFERENCES:
patent: 5581280 (1996-12-01), Reinert et al.
patent: 5633661 (1997-05-01), Morse
patent: 6232955 (2001-05-01), Guttag et al.
Chen Kuei-Hsiang
Chien Cheng-Pang
Lee Tian-Quey
Hjerpe Richard
Hsu Winston
Mustek Systems Inc.
Zamani Ali
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