Image data output controller using double buffering

Details Image data output controller using double buffering Image data output controller using double buffering

2005-04-26

2005-04-26

Bella, Matthew C. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Plural storage devices

C345S531000, C345S532000, C345S537000

Reexamination Certificate

active

06885377

ABSTRACT:
An image data output control apparatus for enhancing a screen update speed to naturally update a screen is provided. The image data output control apparatus comprises first and second memories each for buffering image data of one screen, a host processor for selecting the first and second memories alternately as a display buffer for output of image data of a current screen and a screen buffer for storage of image data of a subsequent new screen, writing the image data of the subsequent screen into the screen buffer to construct the subsequent screen, and outputting the image data of the current screen stored in the display buffer. An output terminal outputs image data from any one of the first and second memories as image data for a screen to be displayed through a display unit.

REFERENCES:
patent: 5347634 (1994-09-01), Herrell et al.
patent: 5438376 (1995-08-01), Watanabe
patent: 6100906 (2000-08-01), Asaro et al.
patent: 6252572 (2001-06-01), Kurumisawa et al.

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