Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Amorphous semiconductor
Reexamination Certificate
2008-01-30
2010-11-30
Nguyen, Ha Tran T (Department: 2829)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Amorphous semiconductor
C438S216000, C438S590000, C257SE21398, C257SE29089
Reexamination Certificate
active
07842587
ABSTRACT:
A semiconductor fabrication process includes forming a gate dielectric layer (120) overlying a substrate (101) that includes a III-V semiconductor compound. The gate dielectric layer is patterned to produce a gate dielectric structure (121) that has a substantially vertical sidewall (127), e.g., a slope of approximately 45° to 90°. A metal contact structure (130) is formed overlying the wafer substrate. The contact structure is laterally displaced from the gate dielectric structure sufficiently to define a gap (133) between the two. The wafer (100) is heat treated, which causes migration of at least one of the metal elements to form an alloy region (137) in the underlying wafer substrate. The alloy region underlies the contact structure and extends across all or a portion of the wafer substrate underlying the gap. An insulative or dielectric capping layer (140,150) is then formed overlying the wafer and covering the portion of the substrate exposed by the gap.
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Abrokwah Jonathan K.
Hill Richard J.
Li Xu
Moran David A.
Passlack Matthias
Freescale Semiconductor Inc.
Jackson Walker L.L.P.
Nguyen Ha Tran T
Whalen Daniel
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