III-V compound semiconductor substrate manufacturing method

Details III-V compound semiconductor substrate manufacturing method III-V compound semiconductor substrate manufacturing method

2011-06-14

2011-06-14

Olsen, Allan (Department: 1716)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C257SE21222, C257SE21230

Reexamination Certificate

active

07960284

ABSTRACT:
Affords a III-V compound semiconductor substrate manufacturing method that enables enhancement of the substrate PL intensity. In such a III-V compound semiconductor substrate manufacturing method, first, the surface3aof a wafer3is polished (polishing step). Second, the surface3aof the wafer3is cleaned (first cleaning step S7). Next, the surface3aof the wafer3is subjected to first dry-etching, employing a halogen-containing gas, while first bias voltage is applied to a chuck24for carrying the wafer3. Subsequently, the surface3aof the wafer3is subjected to second dry-etching, employing the halogen-containing gas (second dry-etching step S11), while second bias power lower than the first bias power is applied to the chuck24.

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