III-V Based semiconductor devices and a process for fabrication

Details III-V Based semiconductor devices and a process for fabrication III-V Based semiconductor devices and a process for fabrication

1982-05-07

1985-01-15

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29580, 29576T, 148 15, 148175, 148176, H01L 21203, H01L 21477

Patent

active

044931425

ABSTRACT:
Extremely high-purity and defect-free layers of III-V semiconductor materials are produced by a specific MBE process. This process as applied to GaAs includes protecting the deposition substrate with a passivating surface, removing this surface in situ, treating the bared substrate heated to a temperature below its incongruent melting point with an arsenic-containing gas, and initiating the MBE growth in an environment containing an excess of arsenic over gallium.

REFERENCES:
patent: 3493811 (1970-02-01), Ewing
patent: 3752713 (1973-08-01), Sakuta et al.
patent: 3969164 (1976-07-01), Cho et al.
Cho, "Morphology of Epitaxial Growth of GaAs by a Molecular Beam Method:" Jour. Appl. Phys., vol. 41, No. 7, pp. 2780-2786, Jun. 1970.
Cho, "GaAs Epitaxy by a Molecular Beam Method:" Jour. Appl. Phys., vol. 42, No. 5, pp. 2074-2081, Apr. 1971.
Blakeslee, "Effects of Substrate Misorientation in Epitaxial GaAs," Transactions of Metallurgical Society of AIME, vol. 245, pp. 577-581, Mar. 1969.

Affiliated with

Also associated with

Rating

III-V Based semiconductor devices and a process for fabrication does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with III-V Based semiconductor devices and a process for fabrication, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and III-V Based semiconductor devices and a process for fabrication will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1475928