Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-10-03
2006-10-03
Garbowski, Leigh M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S013000
Reexamination Certificate
active
07117458
ABSTRACT:
A code coverage tool can be made more useful if circuits of a specified function can be identified by their truth table. This knowledge can be used during code coverage testing to determine what circuits may not be covered during the appearance of specified input data configurations for such circuits. Forcing all circuits to a specified state and running the truth table data through them, when properly instrumented in emulation allows for determination of such specified functionality.
REFERENCES:
patent: 5604895 (1997-02-01), Raimi
patent: 5680332 (1997-10-01), Raimi et al.
patent: 5960191 (1999-09-01), Sample et al.
patent: 6240376 (2001-05-01), Raynaud et al.
patent: 6336087 (2002-01-01), Burgun et al.
patent: 6714902 (2004-03-01), Chao et al.
patent: 6990438 (2006-01-01), Chowdhury et al.
patent: WO 01/40941 (2001-06-01), None
Garbowski Leigh M.
Gregson Richard J.
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