IC with dual function clock and device ID circuit

Details IC with dual function clock and device ID circuit IC with dual function clock and device ID circuit

1999-12-23

2001-10-30

Hjerpe, Richard (Department: 2674)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

C710S120000, C713S500000, C713S600000, C713S601000

Reexamination Certificate

active

06311246

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to identifying the device ID and revision number of an integrated circuit, and particularly to providing an electronically readable ID and revision number in a universal asynchronous receiver/transmitter (UART) chip.
Integrated circuit parts are typically identified with a device ID and a revision number. A device ID may distinguish between multiple IC's which are similar, but have different combinations of features corresponding to different price ranges or speeds, for instance. Additionally, each particular product ID may go through multiple revisions. For example, when a bug is discovered in a chip, it can be fixed and a new revision of the chip produced. It is desirable to provide a revision number which can identify the chip to be able to distinguish one revision from another in order to determine which bugs have been fixed.
One method for doing this is to electronically encode a device ID and revision number on the chip itself at a register address, and read it by addressing that register. This method may be viable for a chip, such as a microprocessor, with a large number of address lines and potential register locations.
However, for some other chips, such as a UART chip, there may be only a few address lines (i.e., 3), and thus register space is very limited. In such applications, it is more typical for a label or etching to be placed on the bottom of the chip package. This label can then be visually observed by the user. However, if the chip has been soldered onto a board, this can become problematic.
SUMMARY OF THE INVENTION
The present invention provides an integrated circuit in which the address and data inputs for a clock register to program a clock is also used for device ID and revision number. A shadow register is provided which is accessible to output the ID and revision number when (1) the regular clock register is addressed, and (2) a particular data input for activating the shadow register appears on the data input to the clock register.
In a preferred embodiment, the predetermined data input value is an illegal value not otherwise used. For a clock circuit in which the clock register stores a divide-by value for use in determining the clock frequency, a data value of zero is illegal since the clock speed cannot be divided by zero. Accordingly, a zero value on the data input to the clock register is detected, and used to activate a readout of the shadow register storing the device ID and revision number.
Preferably, the shadow register is programmed during the metalization stage of manufacture of the integrated circuit. In one embodiment, the clock register, or divide-by register, has two 8-bit register locations. The shadow register also has two 8-bit locations, with the device ID being stored in one 8-bit value, and the revision number in the other.
In an alternate embodiment, the shadow register output is not connected to a data output at all, but rather is connected to the clock circuit through a multiplexer. The multiplexer is activated to select the shadow register contents upon detection of a reset signal. Thus, when a reset is received, the clock will initially have a frequency corresponding to the revision number and device ID. Thus, by doing a calculation on the clock frequency, the value used to program it can be determined, and the device ID and revision number determined. When the user reprograms the clock register after reset, the multiplexer will again be switched to use the clock register value to produce the proper clock signal.
The present invention can be used for any integrated circuit having a clock, timer, counter, or similar device. In a preferred embodiment, the invention used in a UART with the clock circuit providing the BAUD rate frequency.
For a fuller understanding of the nature and advantages of the invention, reference should be made to the following description taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 5086387 (1992-02-01), Arroyo et al.
patent: 5410683 (1995-04-01), Al-Khairi
patent: 5481753 (1996-01-01), Miyake et al.
patent: 5706027 (1998-01-01), Hilton et al.

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