Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2007-03-20
2007-03-20
Kebede, Brook (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C438S004000, C257SE21508
Reexamination Certificate
active
10940963
ABSTRACT:
Disclosed is an IC package including an interpose substrate and lands for external connection disposed on a face of the interpose substrate in a grid pattern, the interpose substrate having a penetration hole on at least a position between the lands for external connection disposed in a grid pattern. Besides, there are disclosed an inspection method of an IC package mounting body mounting this IC package, a repairing method of an IC package mounting body mounting this IC package, and an inspection pin for an IC package mounting body used for such an inspection.
REFERENCES:
patent: 5953592 (1999-09-01), Taniguchi et al.
patent: 6014318 (2000-01-01), Takeda
patent: 6932618 (2005-08-01), Nelson
patent: 2002/0117751 (2002-08-01), Crane et al.
patent: 2003/0214047 (2003-11-01), Noguchi
patent: 2003-338588 (2003-11-01), None
Ogawa Hideki
Tanaka Hidenori
Kabushiki Kaisha Toshiba
Kebede Brook
Kim Su C.
Pillsbury Winthrop Shaw & Pittman LLP
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