Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2000-04-07
2003-01-21
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S686000, C257S700000, C257S710000, C257S724000
Reexamination Certificate
active
06509633
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an IC (Integrated Circuit) package loaded with a semiconductor IC chip, particularly an IC chip for high-frequency applications, in a cavity formed therein.
2. Description of the Background Art
A package sealed with resin or a package implemented by a laminate of ceramic layers has customarily been used to densely mount high-frequency semiconductor IC chips on, e.g., a printed circuit board. For example, the IC: package with the ceramic layers (ceramic package hereinafter) has a laminate of a first, a second and a third ceramic layer, as named from the top to the bottom. A cavity is formed at the center of the package throughout the first and second ceramic layers to a certain depth. The cavity has an optimal seize designed in accordance with the size and shape of a high-frequency semiconductor IC chip to be received therein as well as mechanical accuracy required of the assembly of the IC chip. Thirteen lead terminals extend out from each of four sides of the package.
A wiring pattern and a grounding conductor pattern are formed by screen printing in a pattern wiring zone defined on the upper surface of the first ceramic layer. Bonding pads are formed on the first ceramic layer around the cavity and connected to connector electrodes of the IC chip by bonding wires. A ground terminal layer is printed on the upper surface of the second ceramic layer and connected to, the grounding conductor pattern of the first ceramic layer by via holes. A frame is formed on the upper surface of the first ceramic layer. A ceramic cap has been positioned on the frame
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, and thereafter the entire assembly including the IC chip, pattern wiring zone and bonding wires is sealed with, e.g., glass in order to hermetically seal the ceramic package.
The problem with the above conventional ceramic package is that the cavity or space is sized to accommodate only the IC chip. Assume that the control signal lines of the IC chip mounted on the package must have their impedance matched or have their time constant adjusted or that the bypass capacitor of a power supply must be adjusted. Then, resistors, capacitors or similar discrete circuit components or: parts for such adjustment are arranged outside of the package due to the limited space available with the cavity.
However, when the above discrete parts for adjustment are arranged outside of the package, die bonding, wire bonding and lead terminals necessary for connection bring; about parasitic impedance and thereby render the characteristic of a high-frequency circuit unstable. In addition, additional areas for mounting the discrete parts must be provided around the package, increasing the overall size of a circuit board for mounting the package.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an IC package allowing discrete parts for adjustment to be mounted in the inside thereof.
An IC package in accordance with the present invention includes a package body having a cavity formed for receiving an IC chip therein. A terrace protrudes from at least part of edges defining the cavity into the cavity. Discrete devices can be mounted on the terrace, i.e., inside the IC package.
REFERENCES:
patent: 5831810 (1998-11-01), Bird et al.
Cao Phat X.
Doan Theresa T.
Oki Electric Industry Co. Ltd.
Rabin & Berdo P.C.
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