IC memory card system having a common data and address bus

Details IC memory card system having a common data and address bus IC memory card system having a common data and address bus

1993-04-30

1994-11-01

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Plural use of terminal

3651899, 36523001, 36523003, G11C 700, G11C 800

Patent

active

053612280

ABSTRACT:
An IC memory card system has a host for processing data, and an IC memory card removably connected to the host and incorporating a data recording medium implemented by an electrically erasable programmable semiconductor memory. The host comprises a system controller for sending to the memory card an address/data signal for distinguishing an address and data by a logical bilevel state, a read/write signal for distinguishing reading of data and writing of data in the semiconductor memory by a logical bilevel state, and an erase signal for erasing data stored in the semiconductor memory by a logical bilevel state as control signals, and bus clock pulses each being synchronous to a particular address and particular data. The IC memory card comprises a control circuit responsive to the address/data signal, read/write signal, erase signal and bus clock pulses for distinguishing an address and data, distinguishing reading and writing, and determining whether or not to erase existing data, and then reading or writing data in the semiconductor memory or erasing the existing data.

REFERENCES:
patent: 5018017 (1991-05-01), Sasaki
patent: 5091787 (1992-02-01), Watanabe
patent: 5124589 (1992-06-01), Shiomi
patent: 5249160 (1993-09-01), Wu

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