Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1994-11-01
1999-10-26
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
711115, G06F 1214
Patent
active
059745134
ABSTRACT:
A semiconductor storage device having a semiconductor memory for storing various data, a connector portion for uniting with a reader-writer device, and a memory control portion for controlling reading of data from the semiconductor memory and writing of data into the semiconductor memory in accordance with an instruction from the reader-writer device inputted through the connector portion. The semiconductor memory has a set password storage region where a set password has been written. The device is provided with a set password address comparison portion for outputting a coincidence signal to the memory control portion when an address signal inputted from the connector portion points to the set password storage region and a password collation portion for outputting a coincidence signal to the memory control portion when the set password outputted from the memory control portion and the input password inputted from the connector portion coincide with each other. When the coincidence signal from the set password address comparison portion is received, the memory control portion reads a set password out of the set password storage region of the semiconductor memory and outputs the set password to the password collation region, and inhibits access to the semiconductor memory until receiving a coincidence signal from the password collation portion.
REFERENCES:
patent: 3971916 (1976-07-01), Moreno
patent: 4882474 (1989-11-01), Anderl et al.
patent: 5436621 (1995-07-01), Macko et al.
patent: 5519270 (1996-05-01), Yamada et al.
"IC Memory Card Guidelines" Ver 4.1.
Matsuo Yuzou
Suzuki Kyougo
Chan Eddie P.
Ellis Kevin L.
Hitachi Maxell Ltd.
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