Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2010-09-13
2011-10-18
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S639000, C438S652000, C257SE23033, C257SE23067, C257SE23069
Reexamination Certificate
active
08039385
ABSTRACT:
A through substrate via (TSV) die includes a plurality of TSVs including an outer dielectric sleeve and an inner metal core and protruding TSV tips including sidewalls that emerge from the TSV die. A passivation layer lateral to the protruding TSV tips is on a portion of the sidewalls of the protruding TSV tips. The passivation layers is absent from a distal portion of the protruding TSV tips to provide an exposed portion of the inner metal core. The TSV tips include bulbous distal tip ends including a first metal layer including a first metal other than solder and a second metal layer including a second metal other than solder that covers the exposed tip portion. The bulbous distal tip ends cover a portion of the TSV sidewalls and are over a topmost surface of the outer dielectric sleeve, and have a maximum cross sectional area that is ≧25% more as compared to a cross sectional area of the protruding TSV tips below the bulbous distal tip ends.
REFERENCES:
patent: 7833895 (2010-11-01), Bonifield et al.
patent: 2009/0278238 (2009-11-01), Bonifield et al.
patent: 2009/0278245 (2009-11-01), Bonifield et al.
Park Young-Joon
West Jeffrey A.
Brady III Wade J.
Ghyka Alexander
Nikmanesh Seahvosh
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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